Autotuning high-level synthesis for FPGAs using OpenTuner and LegUp

Autotuning high-level synthesis for FPGAs using OpenTuner and LegUp
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使用 OpenTuner 和 LegUp 自动调整 FPGA 的高级综合

DOI:
10.1109/reconfig.2017.8279778
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发表时间:
2017
期刊:
International Conference on Reconfigurable Computing and FPGAs
影响因子:
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通讯作者:
D. Milojicic
D. Milojicic
中科院分区:
--
文献类型:
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作者:
P. Bruel;A. Goldman;S. R. Chalamalasetti;D. Milojicic

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摩尔定律和Dennard缩放的变化使得硬件加速器对于性能改进至关重要,但是配置它们以实现性能、面积和能效是困难的,并且需要专业知识。高级综合(HLS)工具使FPGA的硬件设计能够用高级语言完成,从而减少了所需的成本和时间,但仍然需要配置。本文介绍了一个开源的,灵活的和虚拟化的自动调谐器的LegUp高级综合参数。我们的优化目标是8个硬件指标的加权归一化和(WNS)。权重用于定义针对区域、性能和延迟以及性能的3种优化方案,以及一种平衡方案。自动调谐器发现优化的HLS参数在平衡场景中将WNS降低了16%,在区域场景中降低了23%,在性能场景中降低了23%,在性能和延迟场景中降低了24%。该方法通过为硬件指标选择权重,实现了针对不同目标的高级综合参数的自动调整。
Changes in Moore's law and Dennard's scaling made hardware accelerators critical for performance improvement, but configuring them for performance, area, and energy efficiency is hard and requires expert knowledge. High-Level Synthesis (HLS) tools enable hardware design for FPGAs to be done in high-level languages reducing the cost and time needed but still requiring configuration. This paper presents an open-source, flexible and virtualized autotuner for LegUp High-Level Synthesis parameters. Our optimization target was the Weighted Normalized Sum (WNS) of 8 hardware metrics. Weights were used to define 3 optimization scenarios targeting Area, Performance & Latency and Performance, plus a Balanced scenario. The autotuner found optimized HLS parameters that decreased WNS by up to 16% in the Balanced scenario, 23% in the Area scenario, 23% in the Performance scenario and 24% in the Performance & Latency scenario. This approach enables autotuning High-Level Synthesis parameters for different objectives by selecting weights for hardware metrics.