Characterizing the Performance of Hybrid Memory Cube Using ApexMAP Application Probes
Characterizing the Performance of Hybrid Memory Cube Using ApexMAP Application Probes
复制标题
使用 ApexMAP 应用探针表征混合内存立方体的性能
DOI：
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发表时间：
2016
期刊：
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通讯作者：
J. Shalf
中科院分区：
文献类型：
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作者：
K. Ibrahim;Farzad Fatollahi;D. Donofrio;J. Shalf
对新内存技术性能的全面表征通常是一个微妙的过程，因为在创建完整系统之前很难使内存经历不同的访问模式。简单的性能表征（例如原始带宽）并不能提供有关内存对不同架构设计选择的适用性的足够信息，例如内存中处理的适用性、对宽松排序语义的性能依赖或如何实现原子等。本文讨论使用 ApexMAP 综合基准来评估混合内存立方体（HMC）技术。 ApexMAP 通过空间和时间局部性的简单模型，允许创建许多应用程序探针，这些探针可用于使内存接受不同的访问模式。我们使用 ApexMAP 的 Verilog 实现来显示竞争请求、流量控制和访问粒度对 HMC 性能的影响。根据应用程序局部性参数和 HMC 架构配置，我们展示了观察到的性能的广泛变化（高达 20 倍）。
Full characterization of the performance of a new memory technology is typically a subtle process because of the difficulty in subjecting the memory to different access patterns before creating a full system. Simple performance characterization, such as raw bandwidth, does not give enough information about the suitability of the memory for different architectural design choices, such as suitability for processing in memory, performance reliance on relaxed ordering semantic, or how to implement atomics, etc. This paper discusses the use of the ApexMAP synthetic benchmarks to assess the Hybrid Memory Cube (HMC) technology. ApexMAP, through a simple model for spatial and temporal locality, allows creating many application probes that could be used to subject the memory to different access patterns. We use a Verilog implementation of ApexMAP to show the impact of contending requests, flow control, and access granularity on the HMC performance. We show a wide variation (up to 20×) in the observed performance based on the application locality parameters and the HMC architectural configurations.