Voltage- and ABB-island optimization in high level synthesis
Voltage- and ABB-island optimization in high level synthesis
复制标题
高级综合中的电压岛和 ABB 岛优化
DOI：
10.1145/1283780.1283814
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发表时间：
2007
期刊：
影响因子：
--
通讯作者：
W. Nebel
中科院分区：
文献类型：
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作者：
D. Helms;Olaf Meyer;Marko Hoyer;W. Nebel
使用我们的框架支持同时行为到RTL的综合、组件布局规划以及ABB(自适应主体偏置)和VDD感知的功率和延迟预测，我们提出了一种性能中立的优化VDD岛生成和多ABB应用的方法。结果表明，在不损失任何性能的情况下，整个设计的电源和体压的调节使总能耗降低了4.6-38.1%。通过允许一个以上的车身电压，而不优化布局，节省不会进一步增加。仔细规划地板设计，我们可以额外使用VDD-岛，降低8.7%-49.2%的功率。除了节能外，所有建议的ABB方法都可以降低由于PTV(工艺、温度、电压)变化引起的功率和延迟变化性，前提是只需在设计时固定芯片结构，但在系统制造后可以调整电压水平。
Using our framework supporting simultaneous behavioral to RTL synthesis, component-wise floorplanning, as well as ABB (adaptive body biasing) and VDD aware power and delay prediction, we present a performance neutral methodology for optimal VDD-island generation and multiple ABB application. We show that tuning supply and body voltage for the entire design reduces the total energy dissipation by 4.6-38.1% without any performance loss. By allowing more than one body voltage and without optimizing the floorplan, the savings do not rise any further. Carefully floorplanning the design, we can additionally use VDD-islands reducing the power by 8.7-49.2%. In addition to the power savings, the power and delay variability due to PTV (process, temperature, voltage) variation can be reduced with all proposed ABB approaches, assuming that only the chip structure has to be fixed at design time, but the voltage levels can be adapted after the system manufacturing.