Application of selective removal of mesa sidewalls for high-breakdown and high-linearity Ga0.51In0.49P/In0.15Ga0.85As pseudomorphic transistors
Application of selective removal of mesa sidewalls for high-breakdown and high-linearity Ga0.51In0.49P/In0.15Ga0.85As pseudomorphic transistors
复制标题
选择性去除台面侧壁在高击穿高线性Ga0.51In0.49P/In0.15Ga0.85As赝晶晶体管中的应用
DOI：
10.1063/1.123785
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发表时间：
1999
影响因子：
4
通讯作者：
W. Wang
中科院分区：
文献类型：
--
作者：
W. Lour;W. Chang;Wen;Y. Shie;H. Pan;J. Y. Chen;W. Wang
高线性度Ga_（0.51）In_（0.49）P/In_（0.15）Ga_（0.85）As赝晶高电子迁移率晶体管已成功制备并在直流和交流性能方面得到验证。与宽间隙Ga0.51In0.49P栅极绝缘体一起，通过选择性地去除梅萨侧壁，将33 V的栅极到漏极击穿电压进一步提高到40 V以上。1×100 μm2器件在室温（77 K）下的击穿电压和电流密度分别为90（120）mS/mm和646（780）mA/mm。 测得的fT和fmax分别为12和28.4 GHz。当通过选择性去除梅萨侧壁来减小寄生电容时，这些与1 μm栅极器件一致。
High-linearity Ga0.51In0.49P/In0.15Ga0.85As pseudomorphic high electron-mobility transistors have been successfully fabricated and demonstrated in both direct-current and alternating-current performance. Together with a wide-gap Ga0.51In0.49P gate insulator, a gate-to-drain breakdown voltage of 33 V is further improved to over 40 V by selectively removing mesa sidewalls. The transconductance and current density of a 1×100 μm2 device at room temperature (77 K) are 90 (120) mS/mm and 646 (780) mA/mm, respectively. The measured fT and fmax are 12 and 28.4 GHz, respectively. These are consistent with 1 μm gate devices when the parasitic capacitance is reduced by selectively removing mesa sidewalls.