Architectures for Recursive Digital Filters Using Stochastic Computing
Architectures for Recursive Digital Filters Using Stochastic Computing
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DOI：
10.1109/tsp.2016.2552513
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发表时间：
2016-07-15
影响因子：
5.4
通讯作者：
Parhi, Keshab K.
中科院分区：
文献类型：
--
作者：
Liu, Yin;Parhi, Keshab K.
本文讨论了使用随机计算实现数字IIR滤波器。随机计算需要更少的逻辑门，并且具有固有的容错性。因此，这些结构非常适合于纳米级CMOS技术。虽然使用随机计算很容易实现FIR滤波器，但IIR数字滤波器的实现并不简单。随机逻辑假设输入信号的独立性，然而，IIR数字滤波器中的反馈导致输入信号的相关性，并且独立性假设被违反。本文表明，尽管IIR滤波器中存在反馈，但这些滤波器可以使用随机逻辑来实现。随机实现的关键是选择一个IIR滤波器结构，其中的状态是正交的，因此，不相关。提出了两类随机IIR数字滤波器的结构。一类是基于状态正交的基本格型滤波器表示，另一类是基于状态正交的归一化格型滤波器表示。对于每个类别，三个随机实现。首先是基于状态空间描述的IIR滤波器来自格型滤波器结构。第二个是基于转换成一个等价的形式，可以利用新的缩放方法开发的内积计算的格型IIR数字滤波器。第三种是优化随机实现，减少了二进制乘法器的数量。仿真结果表明，在这些结构的高信号错误比和容错性。此外，硬件综合结果表明，这些滤波器结构需要更低的硬件面积和功耗相比，二的补码实现。
This paper addresses implementation of digital IIR filters using stochastic computing. Stochastic computing requires fewer logic gates and is inherently fault-tolerant. Thus, these structures are well suited for nanoscale CMOS technologies. While it is easy to realize FIR filters using stochastic computing, implementation of IIR digital filters is non-trivial. Stochastic logic assumes independence of input signals; however, feedback in IIR digital filters leads to correlation of input signals, and the independence assumption is violated. This paper demonstrates that, despite feedback in IIR filters, these filters can be implemented using stochastic logic. The key to stochastic implementation is selection of an IIR filter structure where the states are orthogonal and are, therefore, uncorrelated. Two categories of architectures are presented for stochastic IIR digital filters. One category is based on the basic lattice filter representation where the states are orthogonal, and the other is based on the normalized lattice filter representation where states are orthonormal. For each category, three stochastic implementations are introduced. The first is based on a state-space description of the IIR filter derived from the lattice filter structure. The second is based on transforming the lattice IIR digital filter into an equivalent form that can exploit the novel scaling approach developed for inner product computations. The third is optimized stochastic implementation with reduced number of binary multipliers. Simulation results demonstrate high signal-to-error ratio and fault tolerance in these structures. Furthermore, hardware synthesis results show that these filter structures require lower hardware area and power compared to two's complement realizations.