An integrated 9-channel time digitizer with 30 ps resolution
An integrated 9-channel time digitizer with 30 ps resolution
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分辨率为 30 ps 的集成 9 通道时间数字转换器
DOI:
10.1109/isscc.2002.993038
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发表时间:
2002
期刊:
影响因子:
--
通讯作者:
J. Kostamovaara
中科院分区:
文献类型:
--
作者:
A. Mantyniemi;T. Rahkonen;J. Kostamovaara
An integrated 9-channel time digitizer with 30 ps RMS resolution, 496 /spl mu/s range, and 50 mW power consumption in 0.6 /spl mu/m CMOS uses a three-stage delay line interpolation and delay-generation principle that divides the 66 MHz clock period into 512 bins using only 45 delay elements.