VerilogA based compact model of a three-terminal ME-MTJ device

VerilogA based compact model of a three-terminal ME-MTJ device
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基于 VerilogA 的三端 ME-MTJ 器件紧凑模型

DOI:
10.1109/nano.2016.7751550
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发表时间:
2016
期刊:
2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO)
影响因子:
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通讯作者:
Jonathan P. Bird
Jonathan P. Bird
中科院分区:
--
文献类型:
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作者:
Nishtha Sharma;A. Marshall;Jonathan P. Bird

文献摘要

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我们提出了第一套基于VerilogA的磁电隧道结(ME-MTJ)器件模型。紧凑型模型是用Verilog-A语言开发的,并通过使用Cadence Spectre和原理图编辑器进行的电气仿真进行了验证。我们给出了基于ME-MTJ的缓冲/反相器和多数门逻辑功能的仿真结果,并显示了它们的集成存储能力。此外,我们还通过全加法器仿真验证了该方法的有效性。在模型中加入了实验参数,以提高模拟精度。仿真结果表明,ME-MTJ模型可以广泛应用于更复杂的电路设计。
We present the first set of VerilogA based models for Magneto-Electric Magnetic Tunnel Junction (ME-MTJ) devices. The compact models have been developed in Verilog-A language and validated by electrical simulations using Cadence Spectre and Schematic Editor. We show simulation results of the ME-MTJ based logic functions i.e. Buffer/Inverter and Majority gate and also show their integrated memory capability. In addition, we have validated the methodology with a full adder simulation. Experimental parameters are included in the models to enhance simulation accuracy. The simulation results indicate that the ME-MTJ models can be used extensively for more complex circuit design.