CAPI: A Coherent Accelerator Processor Interface
CAPI: A Coherent Accelerator Processor Interface
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DOI：
10.1147/jrd.2014.2380198
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发表时间：
2015-02
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影响因子：
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通讯作者：
Jeffrey Stuecheli;B. Blaner;C. Johns;M. S. Siegel
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文献类型：
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作者：
Jeffrey Stuecheli;B. Blaner;C. Johns;M. S. Siegel
异构计算系统联合收割机组合共享存储器的不同类型的计算元件。本文讨论的一类特定的异构系统将传统的通用处理核心和加速器单元配对。虽然这种安排能够显著提高应用程序性能，但设备驱动程序开销和操作系统代码路径开销可能会变得过高。从系统设计的角度来看，处理器芯片的I/O接口是一个非常合适的连接点，因为标准服务器模型可以通过特定于应用程序的加速器进行扩展。然而，传统的I/O连接协议引入了重要的设备驱动程序和操作系统软件延迟。通过一致性加速器处理器接口（CAPI），我们可以将加速器作为一致性CPU对等体连接到I/O物理接口上。CPU对等功能包括跨CPU和加速器的同构虚拟地址空间，以及I/O设备上此共享数据的硬件管理缓存。与传统的I/O模型相比，这种连接方法大大增加了加速的机会，因为启用它所需的软件路径长度要短得多。
Heterogeneous computing systems combine different types of compute elements that share memory. A specific class of heterogeneous systems discussed in this paper pairs traditional general-purpose processing cores and accelerator units. While this arrangement enables significant gains in application performance, device driver overheads and operating system code path overheads can become prohibitive. The I/O interface of a processor chip is a well-suited attachment point from a system design perspective, in that standard server models can be augmented with application-specific accelerators. However, traditional I/O attachment protocols introduce significant device driver and operating system software latencies. With the Coherent Accelerator Processor Interface (CAPI), we enable attaching an accelerator as a coherent CPU peer over the I/O physical interface. The CPU peer features consist of a homogeneous virtual address space across the CPU and accelerator, and hardware-managed caching of this shared data on the I/O device. This attachment method greatly increases the opportunities for acceleration due to the much shorter software path length required to enable its use compared to a traditional I/O model.