A 0.5-V 2.07-fJ/b 497-F2 EE/CMOS Hybrid SRAM Physically Unclonable Function with < 1E-7 Bit Error Rate Achieved through Hot Carrier Injection Burn-in
A 0.5-V 2.07-fJ/b 497-F2 EE/CMOS Hybrid SRAM Physically Unclonable Function with < 1E-7 Bit Error Rate Achieved through Hot Carrier Injection Burn-in
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DOI：
10.1109/cicc48029.2020.9075875
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发表时间：
2020-03
期刊：
影响因子：
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通讯作者：
Kunyang Liu;Hongliang Pu;H. Shinohara
中科院分区：
文献类型：
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作者：
Kunyang Liu;Hongliang Pu;H. Shinohara
本文提出了一种基于SRAM的130 nm标准CMOS物理不可克隆功能（PUF）。PUF具有紧凑的位单元，位单元面积为497 F2。它在评估期间从EE SRAM模式切换到CMOS SRAM模式，从而实现高本机稳定性、低电压评估和低功耗工作。通过在交替方向nMOS负载上进行热载流子注入（HCI）老化，其稳定性增强至100%，不会造成可见的氧化层损伤，也不需要额外的制造工艺或位单元中的额外晶体管。实验结果表明，原型芯片在0.5-0.7 V和-40 ° C至120 °C范围内实现了实际零误码，在相当于约21年运行的加速老化测试后，在最差VT角处实现了零误码（<1 E-7 BER）。PUF在低至0.5 V时稳定工作，能量为2.07 fJ/B，其中包括评估和读出功率。PUF的安全，紧凑，低功耗和100%稳定的特性使其成为资源受限的物联网安全的绝佳候选者。
This paper presents a bit-error free SRAM-based physically unclonable function (PUF) in 130-nm standard CMOS. The PUF has a compact bitcell, with a bitcell area of 497 F2. It switches from EE SRAM to CMOS SRAM mode during evaluation, achieving high native stability, low-voltage evaluation, and low-power operation. Its stability is reinforced to 100% through hot carrier injection (HCI) burn-in on the alternate-direction nMOS load, which causes no visible oxide damage and does not require additional fabrication processes or extra transistors in the bitcell. Experimental results show that the prototype chips achieved actual zero bit error across 0.5-0.7 V and -40°C to 120 °C, as well as zero error (<1E-7 BER) at the worst VT corner after accelerated aging test equivalent to ~21 years of operation. The PUF functions stably down to 0.5 V, with an energy of 2.07 fJ/b, which includes both the evaluation and read-out power. The secure, compact, low-power and 100% stable features of the PUF make it an excellent candidate for the resource-constrained Internet of Things security.