Pin Accessibility Prediction and Optimization with Deep Learning-based Pin Pattern Recognition*
Pin Accessibility Prediction and Optimization with Deep Learning-based Pin Pattern Recognition*
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通过基于深度学习的引脚模式识别进行引脚可访问性预测和优化*
DOI：
10.1145/3316781.3317882
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发表时间：
2019
期刊：
影响因子：
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通讯作者：
Henry Sheng
中科院分区：
文献类型：
--
作者：
Tao;Shao;Hsien;Kai;P. H. Tai;Cindy Chin;Henry Sheng
由于半导体的工艺节点不断缩小，标准单元变得更小，单元数量显著增加。由于高引脚密度、低引脚可访问性和有限的布线资源，较低金属层上的标准单元严重地受到可布线性的影响。图1给出了受相邻单元C1影响的单元C2的不良管脚可访问性的例子。可以观察到，引脚B的接入点被从引脚A和引脚C布线的金属2(M2)布线段阻挡，因此当在引脚B上放置通孔12时，将导致M2短设计规则违反(DRV)。该例子表明引脚可达性不仅由单元布局设计决定，而且受到相邻单元的强烈影响。
Since the process node of semiconductor keeps scaling down, standard cells become much smaller and cell counts are dramatically increased. Standard cells on the lower metal layers severely suffer from low routability due to high pin density, low pin accessibility, and limited routing resources. Fig. 1 gives an example of the bad pin accessibility of cell C2 affected by the adjacent cell C1. It can be observed that the access points of pin B are blocked by the metal 2 (M2) routing segments routed from Pin A and Pin C, so an M2 short design rule violation (DRV) will be induced when dropping a via12 on Pin B. This example shows that pin accessibility is not only determined by cell layout design but also strongly affected by adjacent cells.