Scaling of high-k dielectrics towards sub-1nm EOT

Scaling of high-k dielectrics towards sub-1nm EOT
复制标题

DOI:
10.1109/vtsa.2003.1252599
复制
发表时间:
2003
期刊:
2003 International Symposium on VLSI Technology, Systems and Applications. Proceedings of Technical Papers. (IEEE Cat. No.03TH8672)
影响因子:
--
通讯作者:
M. Heyns;S. Beckx;H. Bender;P. Blomme;W. Boullart;B. Brijs;R. Carter;M. Caymax;M. Claes;T. Conard;S. De Gendt;R. Degraeve;A. Delabie;W. DeWeerdt;G. Groeseneken;K. Henson;T. Kauerauf;S. Kubicek;L. Lucci;G. Lujan;J. Mentens;L. Pantisano;J. Pétry;O. Richard;E. Rohr;T. Schram;W. Vandervorst;P. Van Doorne;S. Van Elshocht;J. Westlinder;T. Witters;C. Zhao;E. Cartier;J. Chen;V. Cosnier;M. Green;S. Jang;V. Kaushik;A. Kerber;J. Kluth;S. Lin;W. Tsai;E. Young;Y. Manabe;Y. Shimamoto;P. Bajolet;H. De Witte;J. Maes;L. Date;D. Pique;B. Coenegrachts;J. Vertommen;S. Passefort
M. Heyns;S. Beckx;H. Bender;P. Blomme;W. Boullart;B. Brijs;R. Carter;M. Caymax;M. Claes;T. Conard;S. De Gendt;R. Degraeve;A. Delabie;W. DeWeerdt;G. Groeseneken;K. Henson;T. Kauerauf;S. Kubicek;L. Lucci;G. Lujan;J. Mentens;L. Pantisano;J. Pétry;O. Richard;E. Rohr;T. Schram;W. Vandervorst;P. Van Doorne;S. Van Elshocht;J. Westlinder;T. Witters;C. Zhao;E. Cartier;J. Chen;V. Cosnier;M. Green;S. Jang;V. Kaushik;A. Kerber;J. Kluth;S. Lin;W. Tsai;E. Young;Y. Manabe;Y. Shimamoto;P. Bajolet;H. De Witte;J. Maes;L. Date;D. Pique;B. Coenegrachts;J. Vertommen;S. Passefort
中科院分区:
其他
文献类型:
--
作者:
M. Heyns;S. Beckx;H. Bender;P. Blomme;W. Boullart;B. Brijs;R. Carter;M. Caymax;M. Claes;T. Conard;S. De Gendt;R. Degraeve;A. Delabie;W. DeWeerdt;G. Groeseneken;K. Henson;T. Kauerauf;S. Kubicek;L. Lucci;G. Lujan;J. Mentens;L. Pantisano;J. Pétry;O. Richard;E. Rohr;T. Schram;W. Vandervorst;P. Van Doorne;S. Van Elshocht;J. Westlinder;T. Witters;C. Zhao;E. Cartier;J. Chen;V. Cosnier;M. Green;S. Jang;V. Kaushik;A. Kerber;J. Kluth;S. Lin;W. Tsai;E. Young;Y. Manabe;Y. Shimamoto;P. Bajolet;H. De Witte;J. Maes;L. Date;D. Pique;B. Coenegrachts;J. Vertommen;S. Passefort

文献摘要

被引文献

相似文献

High-k dielectric layers are deposited using ALD or MOCVD. Most of the work focused on Hf-based high-k dielectrics, either as pure HfO/sub 2/, as silicate or mixed with Al/sub 2/O/sub 3/. In some cases nitrogen is added to improve the high-temperature stability. Various surface preparation methods and deposition conditions are tested. Compatibility of the high-k stacks with poly-Si and metal electrodes is investigated. Significant improvements in yield and thermal stability are obtained by optimized modifications of the high-k stack. Scaling of the equivalent oxide thickness (EOT) is accomplished by implementing novel ideas in interface engineering and high-k materials processing. High-k stacks are tested in transistor structures with small gate lengths. The origin of the electrical instabilities and the observed drive current degradation of high-k transistors as compared to the SiO/sub 2/ reference transistors are studied in detail.