Effects of Ti content and wet-N2 anneal on Ge MOS capacitors with HfTiO gate dielectric
Effects of Ti content and wet-N2 anneal on Ge MOS capacitors with HfTiO gate dielectric
复制标题
Ti 含量和湿式 N2 退火对采用 HfTiO 栅介质的 Ge MOS 电容器的影响
DOI：
10.1016/j.microrel.2007.11.004
复制
发表时间：
2008-04-01
影响因子：
1.6
通讯作者：
Chan, C. L.
中科院分区：
文献类型：
--
作者：
Li, C. X.;Zou, X.;Chan, C. L.
用反应共溅射方法制备了薄的HtTiO栅电介质，然后进行湿法或干法氮气退火。采用不同的钛靶溅射功率，研究了钛含量对HfTiO栅介质性能的影响。实验结果表明，随着钛含量的增加，当钛含量为28%时，介电常数(Kappa)可提高到40。然而，当钛含量过高时，界面性能和栅漏性能都会恶化。结果表明，由于Geox的水解性，湿N-2退火可大大抑制不稳定的低kappa Geox中间层的生长，导致较低的界面态密度和栅漏电流，以及较大的kappa值。在本研究中，当钛靶的溅射功率为80W，HF靶的功率为25W，并在500℃的湿N-2气氛中对300 S进行后沉积热处理时，获得了良好的器件性能：当量氧化层厚度为0.72 nm，当量介电常数为39，界面态密度为6.5×10(11)eV(-1)cm(-2)，栅漏电流为5.7×10(-4)A/cm(2)(V-g=1V)。为了获得用于小尺寸Ge MOS器件的高质量HfTiO栅介质，不仅要优化钛含量，还要在湿N-2环境中进行PDA。(C)2007爱思唯尔有限公司。保留所有权利。
Thin HtTiO gate dielectric is deposited by reactive co-sputtering method followed by wet or dry N-2 anneal. The effects of Ti content on the performance of HfTiO gate dielectric are investigated by using different sputtering powers for the Ti target. Experimental results indicate that as the Ti content increases, the dielectric constant (kappa) can increase up to 40 for a Ti content of 28%. However, when the Ti content is too high, the interface properties and gate leakage properties are deteriorated. On the contrary, results show that owing to the hydrolyzable property of GeOx, the wet-N-2 anneal can greatly suppress the growth of unstable low-kappa GeOx interlayer, resulting in lower interface-state density and gate leakage current, in addition to larger kappa value. In this study, when the sputtering power of the Ti target is 80 W together with a 25-W power for the Hf target and a post-deposition anneal (PDA) in wet-N-2 ambient at 500 degrees C for 300 s, excellent device performance is achieved: equivalent oxide thickness of 0.72 nm, equivalent dielectric constant of 39, interface-state density of 6.5 x 10(11) eV(-1) cm(-2) and gate leakage current of 5.7 x 10(-4) A/cm(2) at V-g = 1 V. Therefore, in order to obtain high-quality HfTiO gate dielectric for small-scaled Ge MOS devices, not only should the Ti content be optimized, the PDA should also be done in a wet-N-2 ambient. (c) 2007 Elsevier Ltd. All rights reserved.