Evaluation of 0.3 µm Poly-Silicon CMOS Circuits for Intelligent Power IC Application
Evaluation of 0.3 µm Poly-Silicon CMOS Circuits for Intelligent Power IC Application
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用于智能功率 IC 应用的 0.3 µm 多晶硅 CMOS 电路评估
DOI：
10.7567/ssdm.1997.c-10-2
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发表时间：
1998
影响因子：
1.5
通讯作者：
A. Nakagawa
中科院分区：
文献类型：
--
作者：
T. Matsudai;M. Terauchi;M. Yoshimi;N. Yasuhara;Y. Ushiku;A. Nakagawa
在本文中，我们报告了0.3 μm栅长多晶硅互补金属氧化物半导体（CMOS）的优良器件性能。0.3 µm n沟道金属氧化物半导体场效应晶体管（NMOSFET）器件的击穿电压超过6 V，高于注入氧隔离（SIMOX）晶片上的NMOSFET器件。10 µm沟道宽度器件的漏极电流为540 µA，是SIMOX上NMOSFET的五分之一。当栅极电压低于0 V时，漏电流小于10-11 A/µm。S因子为125 mV/dec，阈值电压为0.4 V。因此，通/断电流比大于107。在多晶硅NAND环中实现了1 ns的延迟时间。因此，它是确定的多晶硅CMOS是适用于功率器件上的控制和保护电路的制造。
In this paper, we report on the fine device performance of a 0.3 µm gate length polysilicon complementary metal-oxide-semiconductor (CMOS). The breakdown voltage of 0.3 µm n-channel metal-oxide-semiconductor field effect transistor (NMOSFET) devices exceeds 6 V, which is higher than that of NMOSFET devices on separation by implanted oxygen (SIMOX) wafer. The drain current of a 10 µm channel width device is 540 µA, which is one-fifth of that of NMOSFET on SIMOX. The leakage current is less than 10-11 A/µm, when the gate voltage is below 0 V. The S-factor is 125 mV/dec, and the threshold voltage is 0.4 V. Therefore the ON/OFF current ratio is greater than 107. A delay time of 1 ns is achieved in polysilicon NAND rings. Hence, it is ascertained that the polysilicon CMOS is applicable for the fabrication of control and protection circuits on power devices.