Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs
Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs
复制标题
基于目录的众核 CMP 中内存和集群模式的探索
DOI：
10.1109/nocs.2018.8512154
复制
发表时间：
2018
期刊：
影响因子：
--
通讯作者：
P. Mishra
中科院分区：
文献类型：
--
作者：
Subodha Charles;C. A. Patil;Ümit Y. Ogras;P. Mishra
片上网络已成为解决众核芯片多处理器通信要求的标准互连解决方案。众所周知，网络性能和功耗严重依赖于业务负载。网络流量本身不仅是应用程序的函数，也是该高速缓存一致性协议和存储器控制器/目录位置的函数。分布式目录与内存之间的通信可能会引入热点，因为内存控制器的数量远小于内核的数量。因此，重要的是要考虑到目录内存通信，并在架构模拟器中准确地建模它们。本文分析了目录内存流量、不同的内存和集群模式对片上网络流量和系统性能的影响。我们证明，在一个广泛使用的多处理器模拟器不切实际的模型产生误导的电源和性能预测。最后，我们评估了英特尔Xeon-Phi处理器支持的不同内存和集群模式，并在四种不同的缓存一致性协议上验证了我们的模型。
Networks-on-chip have become the standard interconnect solution to address the communication requirements of many-core chip multiprocessors. It is well-known that network performance and power consumption depend critically on the traffic load. The network traffic itself is a function of not only the application, but also the cache coherence protocol, and memory controller/directory locations. Communication between the distributed directory to memory can introduce hotspots, since the number of memory controllers is much smaller than the number of cores. Therefore, it is critical to account for directorymemory communication, and model them accurately in architecture simulators. This paper analyzes the impact of directorymemory traffic and different memory and cluster modes on the NoC traffic and system performance. We demonstrate that unrealistic models in a widely used multiprocessor simulator produce misleading power and performance predictions. Finally, we evaluate different memory and cluster modes supported by Intel Xeon-Phi processors, and validate our models on four different cache coherence protocols.