ClusCross: a new topology for silicon interposer-based network-on-chip
ClusCross: a new topology for silicon interposer-based network-on-chip
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DOI：
10.1145/3313231.3352363
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发表时间：
2019-10
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影响因子：
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通讯作者：
Hesam Shabani;Xiaochen Guo
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文献类型：
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作者：
Hesam Shabani;Xiaochen Guo
核数的增加对片上多处理器的可扩展性提出了挑战。最近的研究提出了通过将大芯片划分为多个较小的芯片并使用基于硅插入器的集成（2.5D）来连接这些较小的芯片来分解的想法。这种方法可以提高成品率，但随着小芯片数量的增加，芯片间的通信成为性能瓶颈。本文提出了一种新的网络拓扑结构，交叉，以提高网络性能的多核互连网络的硅中介层为基础的系统。其核心思想是将每个小芯片视为一个簇，并使用跨簇的长链路来增加对分宽度和减少平均跳数，而不增加路由器中的端口数量。合成的交通模式和真实的应用程序上模拟的周期准确的模拟器。网络延迟减少和饱和吞吐量的改善证明相比，以前提出的拓扑结构。评估了两个版本的RISK Cross拓扑。与最先进的插入器上的网络拓扑结构（未对齐的ButterDonut）相比，一个版本的CockCross具有10%的平均延迟减少。与FoldedTorus和ButterDonut拓扑结构相比，另一个版本的FRONT Cross的功耗分别降低了7%和10%。
The increasing number of cores challenges the scalability of chip multiprocessors. Recent studies proposed the idea of disintegration by partitioning a large chip into multiple smaller chips and using silicon interposer-based integration (2.5D) to connect these smaller chips. This method can improve yield, but as the number of small chips increases, the chip-to-chip communication becomes a performance bottleneck. This paper proposes a new network topology, ClusCross, to improve network performance for multicore interconnection networks on silicon interposer-based systems. The key idea is to treat each small chip as a cluster and use cross-cluster long links to increase bisection width and decrease average hop count without increasing the number of ports in the routers. Synthetic traffic patterns and real applications are simulated on a cycle-accurate simulator. Network latency reduction and saturation throughput improvement are demonstrated as compared to previously proposed topologies. Two versions of the ClusCross topology are evaluated. One version of ClusCross has a 10% average latency reduction for coherence traffic as compared to the state-of-the-art network-on-interposer topology, the misaligned ButterDonut. The other version of ClusCross has a 7% and a 10% reduction in power consumption as compared to the FoldedTorus and the ButterDonut topologies, respectively.