Accelerating Legacy String Kernels via Bounded Automata Learning
Accelerating Legacy String Kernels via Bounded Automata Learning
复制标题
通过有界自动机学习加速遗留字符串内核
DOI：
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复制
发表时间：
2020
期刊：
影响因子：
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通讯作者：
Westley Weimer
中科院分区：
文献类型：
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作者：
K. Angstadt;Jean;Westley Weimer
将硬件加速器（例如FPGA）采用到通用计算管道中的依据不断上升，但这些设备的编程模型远远落后于其CPU对应物。旧版程序通常必须在非常低的抽象水平上重写，这需要对目标加速器体系结构的深入了解。尽管高级合成等技术可以帮助移植某些旧软件，但许多程序在没有手动，特定于体系结构的优化的情况下执行较差。我们提出了一种结合动态和静态分析的方法，以了解现成的遗产代码的功能行为模型，并从此模型中综合了硬件描述。我们开发了一个框架，该框架使用学习理论和软件验证的技术将布尔字符串内核转换为硬件描述。这些包括盎格鲁式状态机器学习算法，有限的软件模型模型检查以增量循环展开以及字符串决策过程。我们的原型实现可以正确地学习识别普通语言并提供几乎近似值的内核功能。我们在现实世界中的基准套件上评估了我们的原型工具，从GitHub存储库中挖掘出来的旧字符串功能，并证明我们能够在72％的情况下学习完全等效的硬件设计，并在另外11％的情况下关闭近似值。最后，我们确定并讨论了将我们提出的框架更普遍地采用的挑战和机遇，从而将我们提出的框架纳入更广泛的功能类型。
The adoption of hardware accelerators, such as FPGAs, into general-purpose computation pipelines continues to rise, but programming models for these devices lag far behind their CPU counterparts. Legacy programs must often be rewritten at very low levels of abstraction, requiring intimate knowledge of the target accelerator architecture. While techniques such as high-level synthesis can help port some legacy software, many programs perform poorly without manual, architecture-specific optimization. We propose an approach that combines dynamic and static analyses to learn a model of functional behavior for off-the-shelf legacy code and synthesize a hardware description from this model. We develop a framework that transforms Boolean string kernels into hardware descriptions using techniques from both learning theory and software verification. These include Angluin-style state machine learning algorithms, bounded software model checking with incremental loop unrolling, and string decision procedures. Our prototype implementation can correctly learn functionality for kernels that recognize regular languages and provides a near approximation otherwise. We evaluate our prototype tool on a benchmark suite of real-world, legacy string functions mined from GitHub repositories and demonstrate that we are able to learn fully-equivalent hardware designs in 72% of cases and close approximations in another 11%. Finally, we identify and discuss challenges and opportunities for more general adoption of our proposed framework to a wider class of function types.
ASPEN：用于下推自动机的可扩展 SRAM 架构
DOI：
10.1109/micro.2018.00079
发表时间：
2018
期刊：
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO
影响因子：
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作者：
Angstadt, Kevin;Subramaniyan, Arun;Sadredini, Elaheh;Rahimi, Reza;Skadron, Kevin;Weimer, Westley;Das, Reetuparna
通讯作者：
Das, Reetuparna