Uniform and ultrathin high-κ gate dielectrics for two-dimensional electronic devices
Uniform and ultrathin high-κ gate dielectrics for two-dimensional electronic devices
复制标题
用于二维电子器件的均匀超薄高π栅极电介质
DOI:
10.1038/s41928-019-0334-y
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发表时间:
2019-12-01
影响因子:
34.3
通讯作者:
Wang, Xinran
中科院分区:
文献类型:
--
作者:
Li, Weisheng;Zhou, Jian;Wang, Xinran
Two-dimensional semiconductors could be used as a channel material in low-power transistors, but the deposition of high-quality, ultrathin high-κ dielectrics on such materials has proved challenging. In particular, atomic layer deposition typically leads to non-uniform nucleation and island formation, creating a porous dielectric layer that suffers from current leakage, particularly when the equivalent oxide thickness is small. Here, we report the atomic layer deposition of high-κ gate dielectrics on two-dimensional semiconductors using a monolayer molecular crystal as a seeding layer. The approach can be used to grow dielectrics with an equivalent oxide thickness of 1 nm on graphene, molybdenum disulfide (MoS2) and tungsten diselenide (WSe2). Compared with dielectrics created using established methods, our dielectrics exhibit a reduced roughness, density of interface states and leakage current, as well as an improved breakdown field. With the technique, we fabricate graphene radio-frequency transistors that operate at 60 GHz, and MoS2 and WSe2 complementary metal–oxide–semiconductor transistors with a supply voltage of 0.8 V and subthreshold swing down to 60 mV dec−1. We also create MoS2 transistors with a channel length of 20 nm, which exhibit an on/off ratio of over 107.Using a monolayer molecular crystal as a seeding layer, hafnium oxide dielectrics with an equivalent oxide thickness of only 1 nm can be deposited on graphene, molybdenum disulfide and tungsten diselenide.