MRONoC: A Low Latency and Energy Efficient on Chip Optical Interconnect Architecture
MRONoC: A Low Latency and Energy Efficient on Chip Optical Interconnect Architecture
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MRONoC：低延迟、高能效的片上光学互连架构
DOI：
10.1109/jphot.2017.2651586
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发表时间：
2017
影响因子：
2.4
通讯作者：
Yintang Yang
中科院分区：
文献类型：
--
作者：
Huaxi Gu;Ke Chen;Zheng Chen;Bowen Zhang;Yintang Yang
由于光缓存不可用，电路交换片上光网络（ONoC）被广泛采用。然而，这种技术遭受有限的传输带宽，高的建立时间开销，和高的网络资源争用，这必然导致长的延迟和降低的吞吐量。在本文中，我们提出了一种新的ONoC架构，旨在超低的设置成本，提高可扩展性，和无竞争的通信。我们首先利用波分复用（WDM）来介绍这种具有高效波长分配的ONoC的基本版本。通过使用多个波导来减轻波长数量上的压力，开发了一系列潜在的版本。这些潜在的版本可以在所需的波长和波导之间进行权衡，并提高可扩展性。新的结构采用两层依赖于层间耦合器，这有助于减少交叉损耗。仿真结果表明，在均匀业务模式下，与采用WDM技术的传统mesh ONoC相比，该架构可以获得133%的饱和带宽提升。
The circuit switched optical network on chip (ONoC) is popularly employed since the optical buffer is not available. However, this technique suffers from limited transmission bandwidth, high setup-time overhead, and high network resource contention, which consequentially induces long latency and degraded throughput. In this paper, we propose a new ONoC architecture aiming at ultralow setup cost, improved scalability, and contention-free communication. We first utilize wavelength division multiplexing (WDM) to introduce the basic version of this ONoC with efficient wavelength assignment. A series of potential versions are developed by using multiple waveguides to relieve the pressure on the number of wavelengths. These potential versions can make a tradeoff between required wavelengths and waveguides and improve the scalability. The new architectures employ two layers relying on the interlayer coupler, which contributes to the decrease of crossing losses. The simulation results show that the architecture can achieve 133% saturated bandwidth improvement compared with the traditional mesh ONoC employing WDM technology under the uniform traffic pattern.