An FPGA-based Time Sampling Charge Measurement Method for TOF-PET Detectors

An FPGA-based Time Sampling Charge Measurement Method for TOF-PET Detectors
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DOI:
10.1109/i2mtc.2019.8827035
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发表时间:
2019-05
期刊:
2019 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)
影响因子:
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通讯作者:
Bo Wu;Yonggang Wang;Qiang Cao;J. Kuang;Mingchen Wang;Xiaoyu Zhou
Bo Wu;Yonggang Wang;Qiang Cao;J. Kuang;Mingchen Wang;Xiaoyu Zhou
中科院分区:
其他
文献类型:
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作者:
Bo Wu;Yonggang Wang;Qiang Cao;J. Kuang;Mingchen Wang;Xiaoyu Zhou

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飞行时间正电子发射断层扫描 (TOF-PET) 探测器的前端电子设备需要同时读出检测到的 $\gamma$ 事件的时间和能量。为了简化电路以实现高集成度,我们提出了一种基于幅度的时间采样方法,采用新颖的算法从时间测量中精确提取能量信息。因此,传统上可以合并两个独立的测量电路,而不会损失每个项目的测量精度。采用该方法的原型完全通过现场可编程门阵列 (FPGA) 实现,并应用于由硅光电倍增管 (SiPM) 和 LYSO 晶体组成的 TOF-PET 探测器。测得探测器的能量分辨率和符合时间分辨率分别为14.18%和316 ps,与传统的单独测量相当。我们的新方法对能量分辨率的贡献经测量为 5.9%,这比探测器的固有能量分辨率要小得多。基于FPGA的原型设计不仅展示了其有效性,而且展示了其实用性。 TOF-PET 扫描仪的前端电子器件不使用 ASIC 技术,而是使用现代 FPGA 芯片,同样紧凑且节能。
The front-end electronics for detectors of time- of-flight positron emission tomography (TOF-PET) is required to read out the time and energy of detected $\gamma$-events simultaneously. To simplify the circuits for high integration, we propose an amplitude based time-sampling method with a novel algorithm to precisely extract the energy information from time measurement. Therefore, traditionally two independent measuring circuits can be merged without losing measurement precision for each item. A prototype with the method was implemented fully with a field programmable gate array (FPGA), and applied to a TOF-PET detector consisted of a silicon photomultiplier (SiPM) coupled with a LYSO crystal. The energy resolution and the coincidence time resolution of the detector were measured as 14.18% and 316 ps respectively, which are comparable with traditional separate measurements. The contribution of our new method to the energy resolution is measured as 5.9%, which is much small than the intrinsic energy resolution of detectors. The FPGA based prototype design demonstrates not only its effectiveness, but also its practicality. Instead of ASIC technology, using modern FPGA chips, the front-end electronics for TOF-PET scanners can be equally compact and power-efficient.