Comparison of Recently Developed Single-Bit All-Digital Frequency Synthesizers in Terms of Hardware Complexity and Performance

Comparison of Recently Developed Single-Bit All-Digital Frequency Synthesizers in Terms of Hardware Complexity and Performance
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最近开发的单比特全数字频率合成器的硬件复杂性和性能比较

DOI:
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发表时间:
2018
期刊:
International Symposium on Circuits and Systems
影响因子:
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通讯作者:
P. Sotiriadis
P. Sotiriadis
中科院分区:
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文献类型:
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作者:
Charis Basetas;Nikos Temenos;P. Sotiriadis

文献摘要

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物联网的发展需要开发低功耗和低成本的无线收发器。在这里,我们提出了三个最近开发的全数字频率合成器架构,可用作物联网应用的发射机。这些全数字发射机基于不同的Σ-Δ调制器架构,性能和硬件复杂性各不相同。三个建议的架构的工作原理进行了说明。然后,这些架构的概念验证FPGA实现,并在硬件资源和速度方面进行比较。使用32-QAM调制信号测试它们的性能。最后,得出的结论,以帮助读者选择最合适的架构为给定的应用程序。
Internet of Things growth requires the development of low power and low cost wireless transceivers. Here, we present three recently developed all-digital frequency synthesizer architectures which can be used as transmitters for Internet of Things applications. These all-digital transmitters are based on different sigma-delta modulator architectures, varying in performance and hardware complexity. The operation principles of the three proposed architectures are described. Then, proof-of-concept FPGA implementations of these architectures are presented and compared in terms of hardware resources and speed. Their performance is tested using 32-QAM modulated signals. Finally, conclusions are drawn to help the reader select the most suitable architecture for a given application.