Automatic generation of macromodels and design equations for application to Op Amp design
Automatic generation of macromodels and design equations for application to Op Amp design
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DOI：
10.1002/cta.3673
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发表时间：
2023-06
影响因子：
2.3
通讯作者：
G. Shi
中科院分区：
文献类型：
--
作者：
G. Shi
运算放大器（Op Amp）是一类特殊的模拟集成电路。多级运算放大器设计最近特别受关注。然而，此类电路的分析必须手动完成，并且需要高级技能。本文研究了此类电路的自动分析，采用了电路识别和符号生成的新方法。电路识别是确定性的，通过确定性电路划分和功能块提取方法来实现。随后可以以大大降低的复杂性对提取的电路块进行符号分析，同时生成的模型和方程为电路设计提供更多有用的信息。如此生成的符号结果可应用于设计空间探索，包括查找电路拓扑的限制、进行初始尺寸调整和确定性能权衡等任务。本文提出了实现 CMOS 运放电路中常用的一些知名功能块识别的关键算法，并进一步探讨了将识别的电路单元与 gm/ID 方法结合使用进行电路尺寸调整的可能性。初步测试表明，这种方法是确定多级运算放大器性能边界的潜在候选方法。
Operational amplifier (Op Amp) is a special class of analog integrated circuits. Multiple‐stage Op Amp design is of particular interest recently. However, analysis of this class of circuits has to be done manually and requires advanced skills. Automatic analysis of this class of circuits is studied in this paper, which takes a novel approach by circuit recognition and symbolic generation. Circuit recognition is deterministic, implemented by deterministic circuit partitioning and functional block extraction methods. Symbolic analysis of extracted circuit blocks can subsequently be performed with greatly reduced complexity while generated models and equations bear more useful information for circuit design. Symbolic results so generated can be applied in design space exploration, including tasks like finding the limitation in circuit topology, conducting initial sizing, and determining performance tradeoffs. This paper proposes the key algorithms for realizing the recognition of a few well‐known functional blocks frequently used in CMOS Op Amp circuits and further explores the possibility of using the recognized circuit cells in combination with the gm/ID method for circuit sizing. Preliminary tests show that this approach is a potential candidate for locating the performance boundaries of multiple‐stage Op Amps.