Generation Of Software Tools From Processor Descriptions For Hardware/software Codesign
Generation Of Software Tools From Processor Descriptions For Hardware/software Codesign
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从处理器描述生成软件工具以进行硬件/软件协同设计
DOI：
10.1109/dac.1997.597162
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发表时间：
1997
期刊：
影响因子：
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通讯作者：
Neeti Khullar
中科院分区：
文献类型：
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作者：
M. Hartoog;J. Rowson;P. D. Reddy;S. Desai;D. Dunlop;Edwin A. Harcourt;Neeti Khullar
一组实验集的工具集，该工具将指令设置模拟器，汇编器和与单个描述的拆卸器，以测试可重新计算的开发工具是否可以使用提供企业商业DSP处理器和微处理器。使用称为NML的语言描述了处理化学集合。 THETMS320C50 DSP处理器和ARM7微处理器在NML中进行了解码。每秒执行25,000个指令的指令集模型，并每秒执行约150,000个说明。该方法的可行性和NML的缺陷的可行性。
An experimental set of tools that generate instruction set simulators,assemblers, and disassemblers from a single description wasdeveloped to test if retargetable development tools would work forcommercial DSP processors and microprocessors. The processorinstruction set was described using a language called nML. TheTMS320C50 DSP processor and the ARM7 microprocessor weremodeled in nML. The resulting instruction set models executeabout 25,000 instructions per second, and compiled instruction setsimulation models execute about 150,000 instructions per second.The viability of this approach and the deficiencies of nML are discussed.