High-Level Approaches to Hardware Security: A Tutorial
High-Level Approaches to Hardware Security: A Tutorial
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DOI：
10.1145/3577200
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发表时间：
2022-07
影响因子：
2
通讯作者：
H. Pearce;R. Karri;Benjamin Tan
中科院分区：
文献类型：
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作者：
H. Pearce;R. Karri;Benjamin Tan
设计人员使用第三方知识产权(IP)核心，并将集成电路(IC)设计和制造流程中的各个步骤外包出去。因此，安全漏洞一直在上升。这迫使IC设计者和终端用户重新评估他们对IC的信任。如果攻击者获得了未受保护的IC，他们可以对IC进行反向工程并盗用IP。同样，如果攻击者获得设计，他们可以在设计中插入恶意电路或利用“后门”。意外的设计错误也可能导致安全漏洞。本教程通过两个硬件安全问题的教学示例介绍了硬件安全领域。第一个是基于扫描链的侧通道攻击的演练。第二个是数字设计的逻辑锁定的演练。教程材料附带了本文中链接的开放访问数字资源。
Designers use third-party intellectual property (IP) cores and outsource various steps in the integrated circuit (IC) design and manufacturing flow. As a result, security vulnerabilities have been rising. This is forcing IC designers and end users to re-evaluate their trust in ICs. If attackers get hold of an unprotected IC, they can reverse engineer the IC and pirate the IP. Similarly, if attackers get hold of a design, they can insert malicious circuits or take advantage of “backdoors” in a design. Unintended design bugs can also result in security weaknesses. This tutorial paper provides an introduction to the domain of hardware security through two pedagogical examples of hardware security problems. The first is a walk-through of the scan chain-based side channel attack. The second is a walk-through of logic locking of digital designs. The tutorial material is accompanied by open access digital resources that are linked in this article.