A 0.016-mm2 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With > 0.95-MHz GBW
A 0.016-mm2 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With > 0.95-MHz GBW
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DOI：
10.1109/jssc.2012.2229070
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发表时间：
2013
期刊：
影响因子：
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通讯作者：
Zushu Yan;Pui-in Mak;M. Law;R. Martins
中科院分区：
文献类型：
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作者：
Zushu Yan;Pui-in Mak;M. Law;R. Martins
介绍了一种能够驱动1~15 nF电容负载的0.016 mm、144W三级放大器。通过电流缓冲米勒补偿和寄生极点抵消(通过有源左半平面零点电路)相结合进行了优化，以小功率和小面积扩展了可驱动性。采用0.35MCMOS工艺，在1-15-nF频率范围内测得的最小增益带宽积为0.95 MHz，最小转换速率为0.22V/S，最小相位裕度为52.3。与现有技术相比，15-nF下的结果对应于2.02倍改进的小信号和1.44倍改进的大信号。在局部反馈回路分析的指导下，系统地进行了定尺和优化。这是一种有洞察力的以控制为中心的方法，使零极点配置在系统级别上更具可分析性和可比性。
A 0.016-mm 144W three-stage amplifier capable of driving 1-to-15-nF capacitive load is described. It is optimized via combining current-buffer Miller compensation and parasitic-pole cancellation (via an active left-half-plane zero circuit) to extend the drivability with small power and area. Fabricated in 0.35m CMOS, the minimum gain-bandwidth product (GBW), slew rate (SR) and phase margin measured over 1-to-15-nF are 0.95 MHz, 0.22 V/ s and 52.3 , respectively. The results at 15-nF correspond to 2.02x-improved small-signal , and 1.44x-improved large-signal with respect to prior art. The sizing and optimization are systematically guided by Local Feedback Loop Analysis. It is an insightful control-centric method allowing the pole-zero placements to be more analyzable and comparable at the system level.