Design-Oriented Study of Advanced Synchronous Reference Frame Phase-Locked Loops
Design-Oriented Study of Advanced Synchronous Reference Frame Phase-Locked Loops
复制标题
DOI：
10.1109/tpel.2012.2204276
复制
发表时间：
2013-02
影响因子：
6.7
通讯作者：
S. Golestan;M. Monfared;F. Freijedo
中科院分区：
文献类型：
--
作者：
S. Golestan;M. Monfared;F. Freijedo
在并网应用中，同步参考系锁相环（SRF-PLL）是一种常用的同步技术，由于它提供的优点，如易于实现和鲁棒的性能。在理想的电网条件下，SRF-PLL能够实现快速准确的相位/频率检测;然而，不平衡和失真的电网条件会严重降低其性能。为了克服这个缺点，已经提出了几种先进的PLL，例如基于多参考系的PLL、基于双二阶广义积分器的PLL和基于多复系数滤波器的PLL。在本文中，这些先进的PLL的全面设计为导向的研究。本研究的出发点是推导出上述PLL的小信号模型，简化了参数设计和稳定性分析。然后，一个系统的设计过程，微调锁相环的参数。稳定裕度、暂态响应和抗干扰能力是设计过程中考虑的关键因素。最后给出了实验结果，验证了理论分析的正确性.
In grid-connected applications, the synchronous reference frame phase-locked loop (SRF-PLL) is a commonly used synchronization technique due to the advantages it offers such as ease of implementation and robust performance. Under ideal grid conditions, the SRF-PLL enables a fast and accurate phase/frequency detection; however, unbalanced and distorted grid conditions highly degrade its performance. To overcome this drawback, several advanced PLLs have been proposed, such as the multiple reference frame-based PLL, the dual second-order generalized integrator-based PLL, and the multiple complex coefficient filter-based PLL. In this paper, a comprehensive design-oriented study of these advanced PLLs is presented. The starting point of this study is to derive the small-signal model of the aforementioned PLLs, which simplifies the parameter design and the stability analysis. Then, a systematic design procedure to fine tune the PLLs parameters is presented. The stability margin, the transient response, and the disturbance rejection capability are the key factors that are considered in the design procedure. Finally, the experimental results are presented to support the theoretical analysis.