An analog non-volatile neural network platform for prototyping RF BIST solutions
An analog non-volatile neural network platform for prototyping RF BIST solutions
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用于原型设计 RF BIST 解决方案的模拟非易失性神经网络平台
DOI：
10.7873/date2014.381
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发表时间：
2014
期刊：
影响因子：
--
通讯作者：
Y. Makris
中科院分区：
文献类型：
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作者：
Dzmitry Maliuk;Y. Makris
我们介绍了一种模拟非易失性神经网络芯片，它可以作为一个实验平台，用于对RF电路的完全独立的内建自测试（BIST）解决方案进行片上集成的原型定制分类器。我们的芯片由一个可重构的突触和神经元阵列组成，工作在阈值以下，功耗低于μW。突触电路采用动态权重存储，用于在训练期间快速双向权重更新。然后，将学习的权重复制到模拟浮栅（FG）存储器上用于永久存储。该芯片架构支持两种学习模型：多层感知器和个体神经网络。首先采用基准XOR任务来评估我们芯片的整体学习能力。BIST相关的有效性，然后评估两个案例研究：检测参数和灾难性故障的LNA和RF前端电路，分别。
We introduce an analog non-volatile neural network chip which serves as an experimentation platform for prototyping custom classifiers for on-chip integration towards fully standalone built-in self-test (BIST) solutions for RF circuits. Our chip consists of a reconfigurable array of synapses and neurons operating below threshold and featuring sub-μW power consumption. The synapse circuits employ dynamic weight storage for fast bidirectional weight updates during training. The learned weights are then copied onto analog floating gate (FG) memory for permanent storage. The chip architecture supports two learning models: a multilayer perceptron and an ontogenic neural network. A benchmark XOR task is first employed to evaluate the overall learning capability of our chip. The BIST-related effectiveness is then evaluated on two case studies: the detection of parametric and catastrophic faults in an LNA and an RF front-end circuits, respectively.