Low Temperature Silicon Epitaxy by Partially Ionized Vapor Deposition
Low Temperature Silicon Epitaxy by Partially Ionized Vapor Deposition
复制标题
部分电离气相沉积低温硅外延
DOI：
10.1143/jjap.16.553
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发表时间：
1977
期刊：
影响因子：
--
通讯作者：
T. Sugiyama
中科院分区：
文献类型：
--
作者：
T. Itoh;Tohru Nakamura;M. Muromachi;T. Sugiyama
采用部分电离气相沉积法在单晶硅衬底上制备了硅薄膜。在室温下，当硅离子电流密度（约占总入射硅原子的25%）超过80 µA/cm 2时，在（111）p型硅衬底上获得单晶薄膜。通过He+背散射测量和电阻率变化测量，研究了在室温和400°C下在100 μA/cm 2的离子电流密度下生长的外延膜的退火行为。
Silicon films were formed on single crystal silicon substrates by partially ionized vapor deposition. Single crystal films were obtained on (111) p-type silicon substrates at room temperature when the silicon ion current density, which was about 25% of the total incident silicon atoms, exceeded 80 µA/cm2. Anneal behaviors of epitaxial films grown at room temperature and 400°C at an ion current density of 100 µA/cm2 were investigated by He+ backscattering measurements and by measurement of change in resistivity.