A PCIe DMA engine to support the virtualization of 40 Gbps FPGA-accelerated network appliances
A PCIe DMA engine to support the virtualization of 40 Gbps FPGA-accelerated network appliances
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DOI：
10.1109/reconfig.2015.7393334
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发表时间：
2015-12
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影响因子：
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通讯作者：
J. F. Zazo;S. López-Buedo;Yury Audzevich;A. Moore
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文献类型：
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作者：
J. F. Zazo;S. López-Buedo;Yury Audzevich;A. Moore
网络功能虚拟化（NFV）允许从通用计算设备（服务器、存储和交换机）创建专用网络设备。在本文中，我们提出了一个PCIe DMA引擎，允许通过使用FPGA加速器提高虚拟网络设备的性能。两个关键技术的演示，SR-IOV和PCI通过。使用这两种技术，单个FPGA板可以加速多个虚拟软件设备。最终的目标是，在NFV场景中，通过联网FPGA板（如NetFPGA SUME）来取代传统的以太网接口。这种方法的优点是FPGA可以非常有效地实现许多网络任务，从而提高虚拟网络设备的性能。本工作中提出的支持SR-IOV的PCIe DMA引擎及其相关驱动程序是实现使用FPGA联网板而不是传统ASIC这一目标的关键要素。DMA引擎和驱动程序都是开源的，面向Xilinx 7系列和UltraScale PCIe Gen 3端点。该设计已在NetFPGA SUME板上进行了测试，批量传输的传输速率达到50 Gb/s。通过利用SR-IOV和PCI Passthrough技术，我们的DMA引擎为从FPGA到虚拟机的数据传输提供了远高于40 Gb/s的传输速率。我们还确定了使用虚拟化FPGA加速器时的瓶颈，这些瓶颈是由最大读取请求大小和最大有效负载PCIe参数的减少造成的。最后，本文提出的DMA引擎是一个非常紧凑的设计，只使用了2%的Xilinx Virtex-7 XC 7VX 690 T设备。
Network Function Virtualization (NFV) allows creating specialized network appliances out of general-purpose computing equipment (servers, storage, and switches). In this paper we present a PCIe DMA engine that allows boosting the performance of virtual network appliances by using FPGA accelerators. Two key technologies are demonstrated, SR-IOV and PCI Passthrough. Using these two technologies, a single FPGA board can accelerate several virtual software appliances. The final goal is, in an NFV scenario, to substitute conventional Ethernet NICs by networking FPGA boards (such as NetFPGA SUME). The advantage of this approach is that FPGAs can very efficiently implement many networking tasks, thus boosting the performance of virtual networking appliances. The SR-IOV capable PCIe DMA engine presented in this work, as well as its associated driver, are key elements in achieving this goal of using FPGA networking boards instead of conventional NICs. Both DMA engine and driver are open source, and target the Xilinx 7-Series and UltraScale PCIe Gen3 endpoint. The design has been tested on a NetFPGA SUME board, offering transfer rates reaching 50 Gb/s for bulk transmissions. By taking advantage of SR-IOV and PCI Passthrough technologies, our DMA engine provides transfers rate well above 40 Gb/s for data transmissions from the FPGA to a virtual machine. We have also identified the bottlenecks in the use of virtualized FPGA accelerators caused by reductions in the maximum read request size and maximum payload PCIe parameters. Finally, the DMA engine presented in this paper is a very compact design, using just 2% of a Xilinx Virtex-7 XC7VX690T device.