DECOY: DEflection-Driven HLS-Based Computation Partitioning for Obfuscating Intellectual PropertY
DECOY: DEflection-Driven HLS-Based Computation Partitioning for Obfuscating Intellectual PropertY
复制标题
DECOY：基于偏转驱动的 HLS 计算分区，用于混淆知识产权
DOI：
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发表时间：
2020
期刊：
影响因子：
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通讯作者：
B. C. Schafer
中科院分区：
文献类型：
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作者：
Jianqi Chen;Monir Zaman;Y. Makris;Shawn Blanton;S. Mitra;B. C. Schafer
在针对类似功能的各种竞争设计中，关键的差异化通常包括少量的定制知识产权（IP）。为了保护该IP免受逆向工程的影响，设计人员需要有效的解决方案来隐藏其实现的独特方面。在这项工作中，我们介绍了一个通用的框架划分的计算进行的设计成一个部分，其实现是众所周知的（和遇到许多设计），这是唯一的设计。前者可以使用传统技术（包括不可信的制造设施）构建，而后者需要使用额外的混淆技术进行保护。（相同或相似的）目标函数的几个其他已知实现的存在充当诱饵，其偏转寻求对独特实现进行反向工程的努力。我们证明了我们的框架，使用硬件加速器的案例研究，其中（a）分区是通过高级综合（HLS），（B）的加速器的通常已知的部分实现为专用集成电路（ASIC），和（c）的独特部分的加速器上实现的嵌入式现场可编程门阵列（eFPGA）。
Among various competing designs targeting similar functionality, the key differentiator typically consists of a small amount of custom Intellectual Property (IP). To protect this IP from reverse engineering, designers need effective solutions for hiding the unique aspects of their implementations. In this work, we introduce a general framework for partitioning the computation performed by a design into a part whose implementation is commonly known (and encountered across many designs), and a part which is unique to this design. The former can then be built using conventional techniques (including untrusted manufacturing facilities) while the latter needs to be protected using additional obfuscation techniques. The existence of several other known implementations of the (same or similar) target function serves as a decoy which deflects efforts seeking to reverse-engineer the unique implementation. We demonstrate our framework using a hardware accelerator case study where (a) partitioning is performed through High Level Synthesis (HLS), (b) the commonly known portion of the accelerator is implemented as an Application Specific Integrated Circuit (ASIC), and (c) the unique portion of the accelerator is implemented on an embedded Field-Programmable Gate Array (eFPGA).