A Memetic Algorithm for VLSI Floorplanning
A Memetic Algorithm for VLSI Floorplanning
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DOI：
10.1109/tsmcb.2006.883268
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发表时间：
2007-02
期刊：
影响因子：
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通讯作者：
Maolin Tang;X. Yao
中科院分区：
文献类型：
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作者：
Maolin Tang;X. Yao
布图规划是超大规模集成电路（VLSI）设计自动化中的一个重要问题，因为它决定了超大规模集成电路芯片的性能、尺寸、成品率和可靠性。从计算的角度来看，VLSI布图规划是一个NP-难问题。提出了一种求解非切片硬模块VLSI布图规划问题的模因算法。该MA是一种混合遗传算法，它使用一种有效的遗传搜索方法来探索搜索空间和一种有效的局部搜索方法来利用搜索区域中的信息。通过一种新的偏置搜索策略来平衡探索和利用。MA已在流行的基准问题上实施和测试。实验结果表明，该算法能快速地为所有测试基准问题产生最优或接近最优的解
Floorplanning is an important problem in very large scale integrated-circuit (VLSI) design automation as it determines the performance, size, yield, and reliability of VLSI chips. From the computational point of view, VLSI floorplanning is an NP-hard problem. In this paper, a memetic algorithm (MA) for a nonslicing and hard-module VLSI floorplanning problem is presented. This MA is a hybrid genetic algorithm that uses an effective genetic search method to explore the search space and an efficient local search method to exploit information in the search region. The exploration and exploitation are balanced by a novel bias search strategy. The MA has been implemented and tested on popular benchmark problems. Experimental results show that the MA can quickly produce optimal or nearly optimal solutions for all the tested benchmark problems