Presidential Young Investigator Award: Research in ParallelArchitectures and Algorithms
Presidential Young Investigator Award: Research in ParallelArchitectures and Algorithms
批准号:
8452003
负责人:
Cauligi Raghavendra
金额:
$29.75万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1985
资助国家:
美国
项目状态:
已结题
起止时间:
1985-09-01 至 1991-02-28
中文摘要
这个并行算法和架构的研究项目研究了专用VLSI架构的设计,VLSI架构的并行算法,以及可靠互连网络的设计和分析。具有高效本地和全局通信特性的创新体系结构旨在支持各种计算:数值计算、几何问题、图形问题等。该模型为这些领域的大量问题提供了实质性的加速。规则的近邻连接使得该架构适合VLSI的实现。这种架构也非常适合许多图像处理应用程序。目前的研究方向是设计在该架构上运行的高效并行算法,以及研究这些算法在VLSI中的实现。
英文摘要
This research program in parallel algorithms and architecture examines the design of special purpose VLSI architectures, parallel algorithms for VLSI architectures, and the design and analysis of reliable interconnection networks. An innovative architecture with efficient local and global communication features is designed to support a wide variety of computations: numerical computations, geometric problems, graph problems, and others. The model provides substantial speedups for a wide class of problems in these areas. The regular near-neighbor connections made the architecture suitable for VLSI implementation. This architecture is also well suited to many image-processing applications. Current research is directed towards design of efficient parallel algorithms to run on this architecture, as well as the study of the implementation of these in VLSI.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
Task Reconfiguration Problems in High-Performance Distributed-Memory Machines
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批准号:9296043
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项目类别:Continuing grant
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资助金额:$0.0万
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财政年份:1991
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负责人:Cauligi Raghavendra
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依托单位:
Task Reconfiguration Problems in High-Performance Distributed-Memory Machines
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批准号:9101875
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项目类别:Continuing Grant
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资助金额:$0.0万
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财政年份:1991
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负责人:Cauligi Raghavendra
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依托单位:
Research Initiation: Reliability and Performance Analysis Of Interconnection Networks
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批准号:8307077
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项目类别:Standard Grant
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资助金额:$4.8万
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财政年份:1983
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负责人:Cauligi Raghavendra
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依托单位:
海外基金