An Undergraduate Parellel Processing Laboratory

本科生并行处理实验室

• 批准号: 9052113
• 负责人: Stephen Ben-Avi
• 金额: $ 6.8万
• 依托单位: Cooper Union
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1990
• 资助国家: 美国
• 起止时间: 1990-07-01 至 1992-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9052113&HistoricalAwards=false
• 关键词: Undergraduate; Parellel; Processing; Laboratory

Computers with traditional architectures suffer from an inherent limitation known as the "von Neumann bottleneck." Instructions are retrieved from memory and are then executed sequentially, one-by- one, by the Central Processing Unit (CPU). However, the CPU is generally capable of higher speeds than the memory sub-system in which the program resides, so the system as a whole is slowed by the rate at which instructions can be "fetched." Furthermore, many algorithms have portions which could be executed at the same time or in "parallel" if facilities to do this exist. Except for a few expensive special-purpose machines, computers have been Single Instruction Single Data (SISD) processors, performing commands one at a time without the possibility of concurrency. There are applications which cannot be computerized without simultaneous execution of many instructions involving separate vectors or partitions of the data. A modern Electrical Engineering curriculum should include the application of parallel techniques to problems at the frontiers of computing speed, including image and speech analysis, high speed arithmetic, waveform synthesis and signal processing. Therefore, this project establishes a laboratory dedicated to parallel computing using general purpose PCs as hosts to multiprocessor boards. This provides maximum flexibility in configuring systems, the opportunity for incremental growth and the immediate ability for undergraduates to take advantage of new and emerging technology. The award is being matched by an equal amount from the principal investigator's institution.

具有传统架构的计算机具有固有的 这就是所谓的“冯·诺依曼瓶颈”。“指示是 从内存中检索，然后依次执行，一个接一个， 一是中央处理器（CPU）。 然而，CPU 通常能够具有比存储器子系统更高的速度 程序所在的位置，因此整个系统的速度会降低， 指令可以被“取”的速率。“此外，许多 算法具有可以同时执行的部分 或者如果存在这样做的设施，则“并行”。 除了几 昂贵的专用机器，计算机已被单一 指令单数据（SISD）处理器，执行命令一 在一个没有并发的可能性的时间。 有 不同时进行计算机处理的应用程序 执行涉及单独向量的许多指令，或 数据的分区。 现代电气工程课程 应包括应用并行技术解决问题 在计算速度的前沿，包括图像和语音 分析，高速运算，波形合成和信号 处理. 因此，本项目建立了一个实验室， 专用于使用通用PC作为主机的并行计算 到多处理器板。 这提供了最大的灵活性， 配置系统、增量增长的机会以及 大学生利用新的和 新兴技术。 与此同时， 从首席研究员所在的机构