Presidential Young Investigator Award: Parallel Logic Programming Architectures

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This project involves the development and analysis of a new parallel logic programming system. The system is based on a flat variation of the Pandora language, incorporating both stream communication with backtracking nondeterminism. A reduced instruction-set architecture and storage model for efficient implementations of backtracking and memory management are major concerns. In addition, methods of scheduling implicit parallelism with graphical tools will be explored. The radically new approach is based on decompiling the programmer's interaction with a graphical execution summary. The goal of the trace-driven graph is to summarize only the program execution characteristics relevant to performance: granularity and dependencies. This abstraction is necessary to summarize large programs. Programmer annotations of the graph made by mouse can be generalized to explicit pragma within the source program. This approach is used on top of other schedulers (e.g., on-demand schedulers or explicit schedulers) for fine tuning applications performance. Empirical analysis of benchmark performance is a critical factor throughout the design process.