Developing Advanced Digital Design Laboratory Using Field Programmable Gate Array Development Systems

使用现场可编程门阵列开发系统开发高级数字设计实验室

• 批准号: 9250850
• 负责人: Chang Choo
• 金额: $ 3.34万
• 依托单位: San Jose State University Foundation
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1992
• 资助国家: 美国
• 起止时间: 1992-09-01 至 1995-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9250850&HistoricalAwards=false
• 关键词: Developing; Advanced; Digital; Design; Laboratory

Seniors in electrical engineering and microelectronics courses at San Jose State University are using Field Programmable Gate Array (FPGA) development systems as a design tool in their digital systems laboratory experience. New laboratory modules are used in teaching computer organization and digital system interfacing courses. The FPGA laboratory facilities also support senior student projects, providing a more interesting learning and teaching environment by enabling rapid prototyping and concurrent engineering.

电气工程和微电子课程的高年级学生 在圣何塞州立大学， 阵列（FPGA）开发系统作为其设计工具， 数字系统实验室经验。 新的实验室模块 用于计算机组成和数字系统的教学 接口课程。 FPGA实验室设施还 支持高年级学生的项目，提供更有趣的 通过快速原型设计， 并行工程。