NSF Young Investigator Award: A Design Language for Asynchronous Circuit Synthesis

烧伤 这项研究是开发一个统一的设计语言和框架，异步电路设计可以完全指定，并在其中作出的决定，在综合的实施可以记录。 该语言是Hoare的CSP的扩展，它具有指定结构层次的方法，并具有叠加在其上的细化层次结构。该研究包括三个相互关联的任务：语言定义;开发工具，如解析器，编译器，视图生成器，握手扩展和产生式规则集;以及将这些工具应用于大型设计或真实的时间系统。 一个用于确定并发系统中事件发生的最大时间间隔的算法正在开发中。

Burns This research is on developing a unifying design language and framework in which asynchronous circuit designs can be completely specified, and in which decisions made during synthesis of the implementation can be recorded. The language is an extension of Hoare's CSP with a means to specify structural hierarchy with a refinement hierarchy superimposed upon it. The research consists of three interconnected tasks: language definition; developing tools such as a parser, flattener, view generator, handshaking expansions, and production rule sets; and application of the tools to a large design or a real time system. An algorithm for determining the maximum time separation of event occurrences in a concurrent system is being developed.