Computer Systems, Communication and Networks Laboratory Proposal

这个项目是通过为旧金山州立大学现有的“计算机系统”和“计算机通信与网络”课程的实验室配备新的设计和分析工具来改进实验室。为了强化课堂上所学的知识，本科生使用基于高级排队模型和数字电路模型的软件和设计工具来模拟他们为家庭作业和实验室项目设计的网络和计算机系统。学生首先学习计算机系统的理论基础，然后设计这些组件和系统的各个方面，最后使用计算机模拟测试他们的设计。在新结构的课程中，学生们正在对他们的设计进行实际的模拟，并且能够发现在纸笔设计中很难发现的错误，如果不是不可能的话。通过系统地检查自己的电路设计，学生们发现了自己在逻辑上的错误，并增加了他们对设计中使用的理论概念的理解。

This project is improving the existing laboratory for the "Computer Systems" and "Computer Communication & Networks" courses at San Francisco State University by equipping the laboratory with new design and analysis tools. To reinforce the material learned in the classroom, undergraduates are using software and design tools based on advanced queueing models and digital circuit models to simulate the networks and computer systems that they design for their homework assignments and laboratory projects. Students are first learning the theoretical basis of computer systems, then designing various aspects of these components and systems, and finally testing their designs using computer simulations. In the newly structured courses, students are conducting actual simulations of their designs and are able to discover errors that are very difficult, if not impossible, to detect in a paper-and-pencil design. Students are uncovering their own mistakes in logic as they systematically check their own circuit designs and are increasing their understanding of the theoretical concepts used in their designs.