Grid Optimization and Adaptation in Semiconductor Process and Device Problems

Carey网格细化解决方案是半导体器件和工艺模拟的关键问题领域和关键“瓶颈”（例如，参见Semiconductor Industry Association Roadmap，1993）。 开放的问题范围从他的非结构化自适应二维和三维网格的有效生成的基本问题，可靠的错误指标和增强的解决方案技术，利用网格。 本研究建立在调查人员以前的经验，自适应网格集中在网格问题的半导体工艺CAD。半导体问题的网格研究主要有五个方面：1。用于半导体器件和工艺应用的二维和三维非结构化和移动网格：2。四叉树/八叉树数据结构和自适应细化/重分布; 3.对设备和工艺问题进行了后验误差分析和误差指标的细化和可靠性计算;精化求解策略，以利用不断发展的网格，提高计算效率; 5.典型设备和工艺问题的基准研究和应用。

9412475 Carey Grid refinement-solution is a key problem area and critical "bottleneck" to semiconductor device and process simulation (e.g. see the Semiconductor Industry Association Roadmap, 1993). The open issues range from he basic questions of efficient generation of unstructured adaptive 2D and 3D grids, to reliable error indicators and enhanced solution techniques that exploit the grid. The present research builds on the investigators' previous experience in adaptive grids to focus on the grid problem for semiconductor technology CAD. There are five main thrusts to the grid research for semiconductor problems: 1. Two and three-dimensional unstructured and moving grids for semiconductor device and process applications: 2. Quadtree/octree data structures and adaptive refinement/redistribution; 3. A posteriori error analyses and error indicators for refinement and reliability calculation in the device and process problems; 4. Refinement-Solution strategies to exploit the evolving grid and enhance computational efficiency; 5. Benchmark studies and application to representative device and process problems.