Grid Optimization and Adaptation in Semiconductor Process and Device Problems

9412475凯瑞网格精细化-解决方案是半导体器件和工艺模拟的一个关键问题领域和关键“瓶颈”(例如，参见1993年半导体工业协会路线图)。有待解决的问题包括有效生成非结构化自适应2D和3D网格的基本问题，以及利用该网格的可靠错误指示器和增强的解决方案技术。本研究基于研究者先前在自适应网格方面的经验，将重点放在半导体工艺CAD中的网格问题上。半导体问题的网格研究有五个主要方向：1.半导体器件和工艺应用的二维和三维非结构化和移动网格：2.四叉树/八叉树数据结构和自适应精化/重分布；3.用于器件和工艺问题中的精化和可靠性计算的后验误差分析和误差指示器；4.利用不断发展的网格和提高计算效率的精化-解决策略；5.基准研究和应用于典型的器件和工艺问题。

9412475 Carey Grid refinement-solution is a key problem area and critical "bottleneck" to semiconductor device and process simulation (e.g. see the Semiconductor Industry Association Roadmap, 1993). The open issues range from he basic questions of efficient generation of unstructured adaptive 2D and 3D grids, to reliable error indicators and enhanced solution techniques that exploit the grid. The present research builds on the investigators' previous experience in adaptive grids to focus on the grid problem for semiconductor technology CAD. There are five main thrusts to the grid research for semiconductor problems: 1. Two and three-dimensional unstructured and moving grids for semiconductor device and process applications: 2. Quadtree/octree data structures and adaptive refinement/redistribution; 3. A posteriori error analyses and error indicators for refinement and reliability calculation in the device and process problems; 4. Refinement-Solution strategies to exploit the evolving grid and enhance computational efficiency; 5. Benchmark studies and application to representative device and process problems.