Engineering Faculty Internship: A Seamless Environment for Productivity Enhancement; Design Synthesis

小行星9412705 这个夏季教师实习允许调查人员 参与工业设计，发展自己的现实设计 例如，将这些经验纳入超大规模 在大学教授的集成电路（VLSI）课程， 开发对学生和行业都有用的视频教程 工程师 该项目解决了中级任务，并使用两个独立的商业工具从顶层设计，预设计/供应商提供/定制模块的合成，优化和回注释接口映射到低级或物理设计。 这个项目的材料是针对高级本科/研究生课程的超大规模集成电路系统设计。

9412705 Pandya This summer faculty internship permits the investigators to be involved in industrial designs, evolve their own realistic design examples, incorporate such experiences in the Very Large Scale Integrated Circuits (VLSI) courses taught at the university and develop video tutorials useful for both the students and industry engineers. This project addresses the intermediate-level tasks and uses two separate commercial tools for mapping from top-level design, synthesis with pre-designed/vendor-supplied/custom-built modules, optimization and back-annotation interfaces to low-level or physical design. This project's material is targeted to senior undergraduate/graduate courses on VLSI System design.