CPA-CPL: A hardware-design inspired methodology for parallel programming

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A source of weakness in parallel programming has been the lack of compositionality; independently-written parallel programs, e.g., libraries and packages, can't be combined to produce large parallel programs with predictable performance or functionality. One may have the best parallel implementations of FFT and Linear Equation Solvers and yet a large parallel program that calls both of these procedures in parallel may not run well. The problem is much worse for applications that are inherently parallel but produced by combining existing sequential implementations. Consider your cell phone: it may drop an incoming call while you are surfing the web, or not stop playing the music when you answer a call. The problem is compositionally -- two independently written programs don't interact properly in a parallel setting.A scalable model for software composition is space-multiplexing, where a set of resources (e.g., processors and memory) are devoted exclusively to executing a given program fragment or module. This research plans to define and use Bluesoft -- a derivative of the Bluespec SystemVerilog (BSV) -- as its source language. Bluespec?s semantics are well understood and there is substantial experience in using it for hardware design in both academia and industry. Bluesoft adds to Bluespec a ?sequential connective? for combining atomic actions, a crucial feature needed for software design. The Bluesoft compiler will combine the strategies used for compiling Bluespec and StreamIt, a stream-based language developed at MIT for tiled architectures. The Bluesoft compiler will borrow the static elaboration phase of the BSV compiler to generate a network of modules and use the sophisticated program analysis and code generation techniques used in the StreamIt compiler for the backend.