II-EN: Infrastructure for Computer Architecture Research

拟议的基础设施增强所带来的研究与微处理器行业面临的主要挑战直接相关。由此产生的工具和结果的传播将加速硬件和软件多核研究的进展。它还将增加对计算机程序中动态数据引用和分支行为的理解，从而为未来硬件预测机制的设计提供见解。基础设施的改善不仅会对研究生产力产生影响，还会对教育活动产生影响。额外的资源将允许在课程的上层引入更多的模拟项目和动手多处理器设计，同时扩大本科生对研究活动的参与。此次收购的高性能FPGA开发板和小型服务器将用于罗德岛大学微体系结构研究洞察实验室的研究人员，以支持正在进行的FPGA加速仿真和以模式为中心的硬件预测机制的计算机体系结构研究项目。此次收购所带来的研究成果和工具将为未来多核系统的架构创新提供探索，为fpga提供急需的建模和仿真解决方案，克服软件仿真性能瓶颈。这项工作将大大提高教师和学生进行计算密集型研究项目的能力，并将为通过模拟完成的计算机体系结构研究任务提供高吞吐量。

The research enabled by the proposed infrastructure enhancement is directly related to the major challenges that face the microprocessor industry. Dissemination of the resulting tools and results will accelerate the progress of hardware and software multi-core research. It will also increase the understanding of dynamic data reference and branch behavior in computer programs, which as a result, will provide insights into the design of future hardware prediction mechanisms. The infrastructure enhancement will have an impact not only on research productivity but also on education activities. The additional resources will permit the introduction of more simulation projects and hands-on multiprocessor design in upper levels of the curriculum, and at the same time broaden the participation of undergraduate students in research activities. The acquisition of high-performance FPGA development boards and small-scale servers will be used by the researchers at the Microarchitecture Research Insights Laboratory at the University of Rhode Island to support ongoing computer architecture research projects on FPGA-accelerated simulation and pattern-centric hardware prediction mechanisms. Results and tools from the research enabled by this acquisition will enable exploration of architectural innovations in future multi-core systems by providing much needed modeling and simulation solutions on FPGAs that overcome software simulation performance bottleneck. The effort will greatly enhance the ability of faculty and students to do computationally intensive research projects and will provide high throughput for tasks arising from computer architecture research done by simulation.