STTR Phase I: Sub-circuit Energy Monitoring and Performance ReAction Software (SEMPRA Software)

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The broader impact/commercial potential of this project centers on increasing the efficiency of computer power utilization even as transistors continue to shrink in size. The energy density requirements of modern computing devices are higher than ever before, leading to strict power constraints in mobile devices, high operating costs for fixed infrastructure computing, and incredibly low yields for the highest-density microchips. Mobile device manufacturers fiercely compete on battery life. Cloud service providers consume, and pay for, the energy equivalent of small cities. Meanwhile, the competitiveness of American manufacturers hangs in the balance. The present project will have wide ranging impacts in Energy and Power Management in microchips, electronic devices, and smart power demand-response management systems that utilize them, by increasing IC performance without increasing power ? opening the door to a new era of computer power utilization. This Small Business Technology Transfer (STTR) Phase I project expands upon both industry and academic research concerning in-situ power measurement and power management of integrated chips. For the most part, to date both industry and academic research has produced a striking paucity of practical solutions for in-situ power measurement. This project, however, builds upon prior NSF-funded research which has pointed toward novel practical applications. By removing significant technical risks in an industry-class testbed, this STTR project will demonstrate the viability of one of these applications, which will provide accurate sub-component level power and temperature monitoring, run-time hotspot detection on a fully packaged chip, and intelligent power management based on accurate power/temperature measurements. Until this is project is complete, no one can predict whether it is possible to operate with overheads that are low enough to justify commercial adoption.