SHF: Small: Holistic Design of High-performance and Energy-efficient Accelerators for Graph Neural Networks

SHF：小型：图神经网络高性能、高能效加速器的整体设计

基本信息

批准号：
2131946
负责人：
Ahmed Louri
金额：
$ 50万
依托单位：
George Washington University
依托单位国家：
美国
项目类别：
Standard Grant
财政年份：
2021
资助国家：
美国
起止时间：
2021-10-01 至 2024-09-30
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=2131946&HistoricalAwards=false
关键词：
SHF Small Holistic Design performance

项目摘要

Graph Neural Networks (GNNs) have emerged as one of the most powerful techniques for next-generation learning systems, and are gaining attention in many high-impact domains such as graph mining (graph machine, graph clustering), biology (drug discovery, disease classification), traffic networks (traffic prediction), recommendation systems (user-item prediction, social recommendation), e-commerce analysis, stock market prediction, natural language processing (text classification, neural machine translation), image processing (image classification, object detection, semantic segmentation), and autonomous systems, among many others. The explosive growth of these applications has created an enormous demand for customized accelerator design to satisfy the computational requirements of GNNs, since many of these applications require high-throughput and energy-efficient GNN inference. Conventional deep neural network (DNN) accelerators cannot efficiently process GNNs due to the combination of irregular memory accesses, dynamic parallelism imposed by the graph structure, and the dense computation in learning algorithms. This project addresses these challenges with a holistic design framework spanning architecture study, Network-on-Chip (NoC) design, machine-learning algorithms development, and algorithm-architecture co-optimization with the aim of designing energy-efficient and high-performance accelerator architectures for GNNs. The cross-cutting nature of this project will offer valuable insights and solutions to many critical problems in GNN accelerator design. The research will also play a major role in education by integrating discovery with teaching and training. The outcomes of this project will be widely disseminated to researchers, engineers, and educators through technical publications and presentations. The goal of this project is to develop GNN accelerators with much-improved performance and energy efficiency for a wide variety of graph-based machine learning applications. To achieve this goal, this project proposes: (1) the design of a morphable GNN accelerator architecture and a reconfigurable NoC to satisfy the computational demands of various GNNs, (2) the development of a GNN accelerator/algorithm co-optimization exploration framework to maximize both inference accuracy and performance (latency, area, energy, etc.) for given graph-based machine learning tasks, (3) the development of an extensive modeling and simulation framework for GNN accelerators that will be used to validate the proposed design approach, and (4) the implementation of a small-scale prototype of the proposed accelerator using Field Programmable Gate Arrays (FPGAs) and its application to real-world problems. This timely research will greatly advance the state-of-the-art of GNN acceleration, benefit both the computing and machine-learning communities, and provide strong implications on advancements in society and the US computing industry-at-large.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

Graph Neural Networks (GNNs) have emerged as one of the most powerful techniques for next-generation learning systems, and are gaining attention in many high-impact domains such as graph mining (graph machine, graph clustering), biology (drug discovery, disease classification), traffic networks (traffic prediction), recommendation systems (user-item prediction, social recommendation), e-commerce analysis, stock market prediction, natural language processing (text classification,神经机器翻译），图像处理（图像分类，对象检测，语义分割）和自动源系统等。这些应用程序的爆炸性增长已经对定制的加速器设计产生了巨大的需求，以满足GNN的计算要求，因为这些应用程序中的许多需要高通量和节能的GNN推断。传统的深神经网络（DNN）加速器无法有效地处理GNN，因为不规则的内存访问，图形结构施加的动态并行性以及学习算法中的密集计算。该项目通过整体设计框架，跨越建筑研究，网络芯片（NOC）设计，机器学习算法开发以及算法 - 构造协会的共临时来解决这些挑战。该项目的横切性质将为GNN加速器设计中许多关键问题提供宝贵的见解和解决方案。这项研究还将通过将发现与教学和培训相结合，在教育中发挥重要作用。该项目的结果将通过技术出版物和演示文稿广泛传播给研究人员，工程师和教育者。该项目的目的是为各种基于图形的机器学习应用程序开发具有大量的性能和能源效率的GNN加速器。为了实现这一目标，该项目提出：（1）设计可变形的GNN加速器体系结构和可重新配置的NOC以满足各种GNN的计算需求，（2）开发GNN Accelerator/Algorithm Co-Optimigation探索框架的开发，以最大程度地开发精确性和表现，以最大程度地进行精确的范围（能量），以构建了范围，3个机器，3个机器，3个机器，3。用于GNN加速器的广泛建模和仿真框架，该框架将用于验证提出的设计方法，以及（4）使用现场可编程门阵列（FPGA）及其在现实世界中的应用，实现了建议的加速器的小规模原型。这项及时的研究将极大地推动GNN加速的最先进，受益于计算和机器学习社区，并对社会的进步和美国计算行业的进步产生强烈的影响。这项奖项反映了NSF的法定使命，并通过该基金会的知识优点和广泛的影响来评估NSF的法定任务，并通过评估值得进行评估。