CNS Core: Small: Redesigning I/O Across Heterogeneous Systems

近年来数据的指数增长刺激了性能、成本和容量各不相同的异类存储和存储设备的发展。然而，传统的单片I/O软件，如文件系统和键值存储，面临可扩展性和性能限制，使它们无法充分利用各种存储技术的潜力。该项目旨在通过设计一个并行的、自适应的、资源高效的存储框架来利用异构存储的能力来解决这些问题。该项目集中在三个关键研究方面。首先，它的目标是将当今复杂的单片I/O堆栈分解为更简单且细粒度的I/O层，将它们组合在一起以满足应用程序的需求。这种方法提供了更大的灵活性和适应性。其次，该项目探索了新的系统抽象，以跨所有系统层捕获I/O数据，从而实现跨异类存储设备的智能数据放置。这通过将数据放置在可以最有效地访问的位置来优化性能和效率。最后，该项目开发了基于学习的新技术，用于在多租户系统中管理性能和以质量为中心的资源分配。通过革命性的I/O加速技术，该项目寻求利用现有和新的存储和内存技术的能力。该项目的基本理念可通过减少I/O延迟、提高吞吐量和扩展容量，同时保持整体系统效率，从而使各种数据中心和HPC应用程序受益。这项研究的结果，包括研究出版物、软件代码和复制系统测量的说明，将通过罗格斯大学的网站和Github页面公开提供(https://github.com/RutgersCSSystems).This奖项反映了美国国家科学基金会的法定使命，并已通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

The exponential growth of data in recent years has spurred the development of heterogeneous storage and memory devices with varying performance, cost, and capacity. However, traditional monolithic I/O software, such as file systems and key-value stores, face scalability and performance limitations, preventing them from fully utilizing the potential of diverse storage technologies. This project aims to address these issues by designing a parallel, adaptive, and resource-efficient storage framework to leverage the capabilities of heterogeneous storage.The project focuses on three key research thrusts. First, it aims to disaggregate today’s complex monolithic I/O stacks into simpler and fine-grained I/O layers, composing them to meet the demands of applications. This approach provides greater flexibility and adaptability. Secondly, the project explores novel system abstractions to capture I/O data across all system layers, enabling intelligent data placement across heterogeneous storage devices. This optimizes performance and efficiency by placing data where it can be accessed most effectively. Lastly, the project develops novel learning-based techniques for managing performance and quality-centric resource allocation in multi-tenant systems.By revolutionizing I/O acceleration techniques, the project seeks to harness the capabilities of existing and new storage and memory technologies. The fundamental ideas of this project can benefit a wide range of datacenter and HPC applications by reducing I/O latency, increasing throughput, and scaling capacity while maintaining overall system efficiency. Finally, the concepts and prototypes developed will contribute to the education of future generations in the field of hardware-software co-design.The outcomes of this research, which includes research publications, software code, and instructions for reproducing system measurements, will be made publicly available through Rutgers University's website and Github pages (https://github.com/RutgersCSSystems).This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.