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Fast HW/SW Cosimulation for Embedded Multiprocessor System Design

用于嵌入式多处理器系统设计的快速硬件/软件协同仿真

基本信息

批准号：
17300014
负责人：
TAKADA Hiroaki
金额：
$ 4.48万
依托单位：
Nagoya University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
2005
资助国家：
日本
起止时间：
2005 至 2006
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-17300014/
关键词：
Cosimulation Real-time OS SystemC Embedded systems Multiprocessors Shared memory

项目摘要

In this research, we have developed technology and tools for fast cosimulation of embedded software and hardware. For the two years, we have completed the following achievements.1. We have developed the two techniques for cosimulation of embedded multiprocessor systems.(1) A flexible communication technique between multiple RTOS simulators and one or more hardware simulators.(2) A technique for sending/receiving interrupts between RTOS simulators.2. We have developed a synchronization technique between RTOS simulators and hardware simulators. A hardware simulator sends timer ticks to RTOS simulators, and a timer handler receives the ticks and updates an local timer in each RTOS simulator.3. We have developed a technique for fast cosimulation on multi-core host computers. We have reduced the inter-simulator communication overhead speed by using not only RPC but also shared memory on a host computer.4. We have developed a techniques for cosimulation with the SystemC language, which has become popular for hardware design and validation.5. Based on the cosimulator which we have developed, we have also developed a methodology for efficient design and validation of embedded systems.6. We have conducted a case study with a real-world application in order to evaluate the effectiveness of the HW/SW cosimulator developed in this research. An MPEG encoder/decoder application was used as a demonstrative example. On a multi-core host computer, two RTOS simulators, one HDL simulator and one C model were successfully and efficiently executed.

在本研究中，我们开发了嵌入式软件和硬件快速协同仿真的技术和工具。两年来，我们取得了以下成绩：我们开发了嵌入式多处理器系统协同仿真的两种技术。(1)多个RTOS模拟器与一个或多个硬件模拟器之间的灵活通信技术。(2)在RTOS模拟器之间发送/接收中断的技术。我们开发了一种RTOS模拟器和硬件模拟器之间的同步技术。硬件模拟器向RTOS模拟器发送计时器刻度，计时器处理程序接收刻度并更新每个RTOS模拟器中的本地计时器。我们开发了一种在多核主机上实现快速协同仿真的技术。通过在主机上使用RPC和共享内存，我们降低了模拟器间的通信开销速度。我们已经开发了一种与SystemC语言共同模拟的技术，这种技术在硬件设计和验证中非常流行。基于所开发的协同模拟器，我们还开发了一种有效设计和验证嵌入式系统的方法。为了评估本研究中开发的硬件/软件协同模拟器的有效性，我们对实际应用进行了案例研究。以一个MPEG编码器/解码器应用程序作为演示示例。在多核主机上，成功高效地运行了两个RTOS模拟器、一个HDL模拟器和一个C模型。