Fast HW/SW Cosimulation for Embedded Multiprocessor System Design

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In this research, we have developed technology and tools for fast cosimulation of embedded software and hardware. For the two years, we have completed the following achievements.1. We have developed the two techniques for cosimulation of embedded multiprocessor systems.(1) A flexible communication technique between multiple RTOS simulators and one or more hardware simulators.(2) A technique for sending/receiving interrupts between RTOS simulators.2. We have developed a synchronization technique between RTOS simulators and hardware simulators. A hardware simulator sends timer ticks to RTOS simulators, and a timer handler receives the ticks and updates an local timer in each RTOS simulator.3. We have developed a technique for fast cosimulation on multi-core host computers. We have reduced the inter-simulator communication overhead speed by using not only RPC but also shared memory on a host computer.4. We have developed a techniques for cosimulation with the SystemC language, which has become popular for hardware design and validation.5. Based on the cosimulator which we have developed, we have also developed a methodology for efficient design and validation of embedded systems.6. We have conducted a case study with a real-world application in order to evaluate the effectiveness of the HW/SW cosimulator developed in this research. An MPEG encoder/decoder application was used as a demonstrative example. On a multi-core host computer, two RTOS simulators, one HDL simulator and one C model were successfully and efficiently executed.