Study on Vector Architecture for both Programmability and Peak Performance

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Although SIMD plays an important role in vector processing, suffers from low programmability and cannot cope with new applications which are becoming more complicated. This research places equal emphasis on programmability and for peak performance. Switchon-Future-Event multithreading achieves maximum of 33.5% performance improvement without sacrificing programmability. Increase in are of the register file cause by the multithreading is relaxed by the Non-latency-Oriented Register Cache System. Simulation results show the area is reduced to 24.9%.