Study on an establishment of digital circuit design using statistical timing analysis

在本研究中，我们解决了基本的算法问题，建立了统计设计方法，得到了以下产品。为了提高定时违和概率的计算误差，并处理长期退化的影响，我们采用高斯混合模型对之前的统计静态定时分析算法进行了改进。此外，为了提高时序测试的效率，我们设计了一种从给定电路中去除不必要路径的算法，为了对该算法进行评估，我们设计了一种计算给定路径临界概率的算法。我们设计了一种包含电压和温度波动的延迟变化库的建立方法，以及一种估计长期变化的方法。利用这些方法，我们设计了一种寻找最优电网的算法，以提高电网的整体可靠性。此外，我们还提高了系统对电网分析的仿真速度，为我们的电网综合提供了参考。

In this research, we tackled basic algorithmic problems to establish a statistical design method, and obtained the following products.We modified our previous algorithm for statistical static timing analysis using Gaussian mixture model, so as to improve the calculated error of timing violation probability and to handle the effect of long-term degradation. Moreover, in order to make timing test efficient, we devised an algorithm to remove unnecessary paths from a given circuit, and in order to evaluate this algorithm, we devised an algorithm to calculate the criticality probability of a given path.We devised a method to create a delay variation library which incorporates fluctuations of voltage and temperature, and a method to estimate the long-term variation. By using these methods, we devised an algorithm for finding an optimal power grid which increases overall dependability of the power grid. Moreover, we improved the simulation speed of the system for power grid analysis, which is used for our power grid synthesis.