VARMA - Variability Modelling and Analysis Tool

VARMA（可变性建模和分析）工具正在开发中，作为一种用户友好的工具，它将标准过程/设备模拟器和电路模拟器连接起来，允许识别对设备和电路性能影响最大的过程变化，以及随后将其同化到电路设计阶段。因此，VARMA在设计和技术之间架起了一座桥梁。其发展的基本原理总结如下。为了满足市场的需求，芯片的复杂性不仅从设计方面增加，而且从制造方面也在增加。据估计，以目前的技术，制造过程需要超过34个掩模，500个加工步骤和超过600个设计规则，平均总体设计成本为3000万美元，掩模成本每进步到下一个技术节点就会增加50%。此外，据认为，对于一个新产品，重新旋转的可能性是50-80%，导致产品进入市场的12-16周延迟。因此，在一个产品在一年之内就被认为是旧产品的市场中，首次旋转的成功是至关重要的，随着时间的推移，市场状况看起来更像是一个脉冲函数。然而，对于低于65nm的技术，在获得可接受的制造良率之前，至少需要一次设计重新旋转。在过去，重新设计的主要原因是功能设计错误；虽然这些还没有消除，但主要的原因现在是由于工艺变化的影响。随着当今技术的快速变化，为了使产品在市场上竞争，分析制造过程以发展解决方案的机会很少。因此，当制造过程中存在一定程度的不确定性时，波动的潜在影响不仅隐含地影响设备的可制造性，产量和可靠性，而且还影响设计的“侵略性”，从而影响设备性能和随后的产品盈利能力。由于当今设计和制造过程的复杂性，对抗过程可变性的影响不能再留给半导体技术专家通过在过程中引入一些“调整”来缓解问题，因为现在有太多的变量需要考虑。因此，需要一种工具来弥合设计和技术之间的差距。VARMA工具流程允许半导体技术人员和设计人员分析工艺变化对器件和电路性能的影响，以提高良率，并优化制造器件的工艺参数，使其特性符合给定电路应用的要求。因此，VARMA正在开发为一个用户友好的工具，它连接标准的过程/设备模拟器和电路模拟器。因此，VARMA通过内置的用户友好工具（例如，过程向导、技术库创建器、因果分析器等）弥合了设计和技术之间的差距，从而促进了：a)分析过程可变性的影响。b)优化器件和工艺参数，以实现电路级性能特性的给定扩展。c)为一系列当前和未来的处理节点自动生成Si，应变Si等技术库。VARMA与现有DFM工具的不同之处在于，它解决了与设备电气行为影响相关的可变性问题，而不是影响电路设计和物理实现的工艺步骤。

VARMA(Variability Modelling and Analysis) tool is under development as a user friendly tool which interfaces standard Process/Device simulators and Circuit simulators allowing the identification of process variations which will have most effect on device and circuit performance and their subsequent assimilation into circuit design stages. VARMA thus bridges the gap between design and technology. The rationale for its development is summarised below.To satisfy market demands, chip complexity is not only increasing from the aspect of the designer but also for fabrication. It is estimated that with current technologies the fabrication process requires in excess of 34 masks, 500 processing steps and over 600 hundred design rules, with an average, overall, design cost of $30M, with mask costs increasing by 50% with each advance to the next technology node. Furthermore, it is considered that for a new product the possibility for a re-spin is 50-80% introducing a 12-16 week delay in the product reaching the market place. Consequently first spin success is crucial in a market place where a product is considered to be old within a year and market profile over time looks more like an impulse function. However, it is considered that with sub 65nm technologies at least one design re-spin will be required before an acceptable manufacturing yield is obtained. In the past the main reasons for a design re-spin were functional design errors; although these have not been eliminated the major cause is now due to the effects of process variations. With the rapid changes in today's technologies, in order for products to compete in the market place, there are few opportunities to analyse the fabrication process to evolve a solution. Consequently, when there is a degree of uncertainty in the fabrication process the potential effects of fluctuations implicitly impact not only on the device manufacturability, yield and reliability but also on design 'aggressiveness' which affects device performance and subsequently the profitability of the product.As a result of both the complexity of present day design and the fabrication process, combating the effects of process variability can no longer be left to the semiconductor technologists to alleviate the problems by introducing a few 'tweaks' into the process as there are now too many variables to be considered. Consequently there is a need for a tool which bridges the gap between design and technology. The VARMA tool flow permits both the semiconductor technologist and designer to analyse the effects of process variations on device and circuit performance to improve the yield and also the optimisation of process parameters of manufactured devices so that their characteristics match the requirements of a given circuit application. Consequently, VARMA is being developed as a user friendly tool which interfaces standard Process/Device simulators and Circuit simulators.VARMA thus bridges the gap between design and technology with in-built user friendly tools for example, Process Wizard, technology library creator, cause and effect analyser etc., thus facilitating:a) The effects of process variability to be analysed.b) The optimisation of device and process parameters in order to achieve a given spread in circuit level performance characteristics.c) The automatic generation of technology libraries for Si, strained Si etc for a range of current and future processing nodes. VARMA differs form existing DFM tools in that it addresses variability issues related to their effects on the electrical behaviour of devices rather than on process steps which affect the design and physical implementation of the circuit.