Scalable implementation of hybrid spin qubits in CMOS-compatible devices

在 CMOS 兼容器件中混合自旋量子位的可扩展实现

• 批准号: 1937065
• 金额: --
• 依托单位: University College London
• 依托单位国家: 英国
• 项目类别: Studentship
• 财政年份: 2017
• 资助国家: 英国
• 起止时间: 2017 至 无数据
• 项目状态: 已结题
• 来源: https://gtr.ukri.org/projects?ref=studentship-1937065
• 关键词: Scalable; implementation; hybrid; spin; qubits

A quantum computer will solve problems that are impossible even for classical supercomputers to solve in reasonable time. Theoretical studies have indicated an expected "quantum speed-up" over classical computers in applications such as cryptography, optimization and simulation. However, to achieved this quantum speed-up requires large number of accessible qubits with extremely high fidelity. Current quantum technology offered few tens of qubits with barely satisfactory multi-qubit gate fidelity, and still it faces scaling up issues both in qubits as well as in peripheral control circuitry. Researchers have demonstrated qubits constructed from the spin states of impurity donors or quantum dots in silicon(Si) substrates with record-high coherence times. Meanwhile, Si-based qubits could potentially scale up benefiting from the standard industrial complementary metal oxide semiconductor (CMOS) processes. CMOS processes have been developing for the past few decades and state-of-art process can produce billions of transistors within a cm-scale chip. Therefore, silicon spin qubits are very promising candidates for quantum computing based on its robust storage of quantum information and possibility to leverage mature manufacturing processes. This project will investigate a possible spin qubit implementation based on silicon Nanowire Field Effect Transistors (Si NW-FETs). Quantum dots, or potentially donors located within the FET channel, will be used as the qubits, and strategies for using global control to improve scaling will be investigated. Qubit coupling using floating gates will be evaluated, and techniques to achieve high-fidelity spin read-out using reflectometry will be optimised.

量子计算机将解决即使是经典超级计算机也无法在合理时间内解决的问题。理论研究表明，在密码学、优化和模拟等应用中，量子计算机的速度有望超过经典计算机。然而，要实现这种量子加速，需要大量具有极高保真度的可访问量子位。目前的量子技术提供了几十个量子位，几乎没有令人满意的多量子位门保真度，并且仍然面临着量子位和外围控制电路的扩展问题。研究人员已经展示了由硅（Si）衬底中杂质施主或量子点的自旋态构建的量子位，具有创纪录的高相干时间。与此同时，硅基量子比特可能会受益于标准的工业互补金属氧化物半导体（CMOS）工艺。CMOS工艺在过去的几十年里一直在发展，最先进的工艺可以在厘米级芯片内生产数十亿个晶体管。因此，硅自旋量子位是非常有前途的候选者，基于其强大的量子信息存储和利用成熟制造工艺的可能性。本项目将研究基于硅纳米线场效应晶体管（Si NW-FET）的可能的自旋量子位实现。量子点，或位于FET沟道内的潜在施主，将被用作量子位，并将研究使用全局控制来改善缩放的策略。将评估使用浮栅的量子位耦合，并优化使用反射计实现高保真自旋读出的技术。