Hardware for Ultra-Fast CT Reconstruction

用于超快速 CT 重建的硬件

• 批准号: 6936244
• 负责人: Jeffrey Brokish
• 金额: $ 10万
• 依托单位: INSTARECON, INC.
• 依托单位国家: 美国
• 财政年份: 2005
• 资助国家: 美国
• 起止时间: 2005-08-01 至 2006-07-31
• 项目状态: 已结题
• 来源: https://reporter.nih.gov/project-details/6936244
• 关键词: bioimaging /biomedical imaging; biomedical equipment development; computed axial tomography; computer program /software; computer system design /evaluation; computer system hardware; image processing; rapid diagnosis

DESCRIPTION (provided by applicant): In modern Multislice CT scanners, the speed of image reconstruction lags far behind the rate of data collection. The objective of this work is to develop a fundamentally new, algorithmically-accelerated, fast and flexible hardware image backprojector. The algorithms to be employed were developed and patented by the University of Illinois. Using this technology, speed-up factors of 10-50 have been achieved in software demos. Multislice CT scanners will require the additional speed afforded by a special-purpose hardware implementation of the fast algorithms. Accordingly, the Phase I aims of this project are to 1) Design, implement, and optimize the mapping of a fast algorithm onto a field programmable gate array (FPGA) testbed to produce an ultra-fast reconfigurable hardware conebeam backprojector for circular source trajectories, and to 2) Benchmark the cost/performance of the prototype system with both an FPGA implementation of the conventional backprojection algorithm and with the performance of reconstruction engines used in current medical scanners. In Phase II, the FPGA prototype design will be extended to the important helical cone-beam geometry and will be ported to a custom processing board optimized for the architecture and for interface to the standard bus employed by CT manufacturers. The fast image reconstruction engine will greatly increase the throughput of CT scanners, reducing radiologist and patient waiting times, and speeding up diagnosis for critical trauma imaging. Fast reconstruction also will enable fullresolution dynamic real-time CT (e.g. for cardiac), reduced-dose imaging, and the use of computationally demanding exact algorithms for improved image quality.

描述（由申请人提供）： 在现代多层CT扫描仪中，图像重建的速度远远落后于数据收集的速度。这项工作的目标是开发一种全新的、算法加速的、快速且灵活的硬件图像背投仪。所采用的算法由伊利诺伊大学开发并获得专利。使用该技术，软件演示中的加速系数已达到 10-50。多层 CT 扫描仪需要通过快速算法的专用硬件实现来提供额外的速度。因此，该项目的第一阶段目标是 1) 设计、实现和优化快速算法到现场可编程门阵列 (FPGA) 测试台的映射，以生产用于圆形源轨迹的超快速可重构硬件锥束背投影仪，以及 2) 使用传统背投影算法的 FPGA 实现对原型系统的成本/性能进行基准测试 以及当前医疗扫描仪中使用的重建引擎的性能。在第二阶段，FPGA 原型设计将扩展到重要的螺旋锥束几何形状，并将移植到针对架构和 CT 制造商采用的标准总线接口进行优化的定制处理板。快速图像重建引擎将大大提高 CT 扫描仪的吞吐量，减少放射科医生和患者的等待时间，并加快关键创伤成像的诊断速度。快速重建还将实现全分辨率动态实时 CT（例如心脏）、减少剂量成像，以及使用计算要求较高的精确算法来提高图像质量。