An investigation of new DSP algoithms for biomedical engineering and software defined radio; and processes for defect-free implementation on a variety of processor architectures

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Our research currently encompasses the characterization of systems in two diverse areas: telecommunications and imaging. Both areas require (A) fundamental research to discover new algorithms, (B) the development of appropriate software engineering processes to move those new algorithms from a fault-tolerant research environment onto a defect free, embedded system based product, and (C) actual implementation of the embedded product. During a recent NSERC CRD grant (2004 - 2007) with our industrial partner Analog Devices (Canada and US), we developed testing frameworks oriented towards embedded digital signal processing (DSP) platform development. We propose to extend our framework to support the movement of DSP intensive algorithms onto inexpensive, high-speed, client-side, mobile devices based around FPGAs combined with low-cost hypermedia-capable processors. Another of our collaborations is associated with image processing related to edge retention (detection) in the presence of noise, particularly within the context of functional magnetic resonance imaging (fMRI). We have theoretically demonstrated a combined spatial and scale-space approach for a spatially adaptive wavelet-based noise filtering algorithm. We intend to investigate how this multi-space approach can be enhanced by incorporating a new ultra-high speed S-transform (UHS S-transform) algorithm recently patented by members of our group. We propose to validate these extensions through a comparison with existing 'gold-standard' anisotropic filtering techniques prior to moving the algorithms, through our embedded-system testing framework, onto embedded system platforms. This grant also proposes a preliminary, but detailed, study of this new S-transform implementation. It is self-evident that there will be different compromises necessary to get the UHS S-transform to operate within (i) the practical constraints of DSP hyper-media capable, but low-cost, processors used within hand-held consumer products e.g. fMRI and ECG analysis; and (ii) implementing the algorithm on VLIW processors specifically designed to work within a multi-cluster environment.